公开(公告)号：US20240321798A1

公开(公告)日：2024-09-26

申请号：US18602396

申请日：2024-03-12

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Chi-Ren Chen ,  Po-Yung Chang ,  Pei-Geng Weng ,  Yuan-Hung Hsu ,  Chang-Fu Lin ,  Don-Son Jiang

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L24/14 ,  H01L21/56 ,  H01L23/31 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/562

Abstract: An electronic package is provided and includes a carrier for carrying electronic components. Electrical contact pads of the carrier for planting solder balls are connected with a plurality of columnar conductors, and the conductors are electrically connected to a circuit portion in the carrier. By connecting a plurality of conductors with a single electrical contact pad, structural stress can be distributed and breakage of the circuit portion can be prevented.

公开(公告)号：US11764188B2

公开(公告)日：2023-09-19

申请号：US17411228

申请日：2021-08-25

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Meng-Huan Chia ,  Yih-Jenn Jiang ,  Chang-Fu Lin ,  Don-Son Jiang

IPC: H01L25/065 ,  H01L25/16 ,  H01L25/00

CPC classification number: H01L25/0657 ,  H01L25/162 ,  H01L25/50 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2225/06589

Abstract: An electronic package is provided, in which a first electronic element and a second electronic element are disposed on a first side of a circuit structure and a second side of the circuit structure, respectively, where a first metal layer is formed between the first side of the circuit structure and the first electronic element, a second metal layer is formed on a surface of the second electronic element, and at least one thermally conductive pillar is disposed on the second side of the circuit structure and extends into the circuit structure to thermally conduct the first metal layer and the second metal layer. Therefore, through the thermally conductive pillar, heat generated during operations of the first electronic element and the second electronic element can be quickly dissipated to an external environment and would not accumulate.

公开(公告)号：US20230053125A1

公开(公告)日：2023-02-16

申请号：US17978493

申请日：2022-11-01

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Yu-Lung Huang ,  Chih-Ming Huang ,  Kuo-Hua Yu ,  Chang-Fu Lin

IPC: H01L23/538 ,  H01L23/498 ,  H01L21/48

Abstract: An electronic package is provided, in which a circuit board and a circuit block are embedded in an encapsulating layer at a distance to each other, and circuit structures are formed on the two opposite surfaces of the encapsulating layer with electronic components arranged on one of the circuit structures. The circuit block and the circuit board embedded in the encapsulating layer are spaced apart from each other to allow to separate current conduction paths. As such, the circuit board will not overheat, and issues associated with warpage of the circuit board can be eliminated. Moreover, by embedding the circuit block and the circuit board in the encapsulating layer at a distance to each other, the structural strength of the encapsulating layer can be improved.

公开(公告)号：US11521930B2

公开(公告)日：2022-12-06

申请号：US17068988

申请日：2020-10-13

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Yu-Lung Huang ,  Chih-Ming Huang ,  Kuo-Hua Yu ,  Chang-Fu Lin

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/498

Abstract: An electronic package is provided, in which a circuit board and a circuit block are embedded in an encapsulating layer at a distance to each other, and circuit structures are formed on the two opposite surfaces of the encapsulating layer with electronic components arranged on one of the circuit structures. The circuit block and the circuit board embedded in the encapsulating layer are spaced apart from each other to allow to separate current conduction paths. As such, the circuit board will not overheat, and issues associated with warpage of the circuit board can be eliminated. Moreover, by embedding the circuit block and the circuit board in the encapsulating layer at a distance to each other, the structural strength of the encapsulating layer can be improved.

公开(公告)号：US20220375813A1

公开(公告)日：2022-11-24

申请号：US17583946

申请日：2022-01-25

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Yu-Lung Huang ,  Kuo-Hua Yu ,  Chang-Fu Lin

IPC: H01L23/367

Abstract: A heat dissipation structure is provided and includes a heat dissipation body and an adjustment channel. A carrying area and an active area adjacent to the carrying area are defined on a surface of the heat dissipation body, the carrying area is used for applying a first heat dissipation material thereonto, and the adjustment channel is formed in the active area, where one end of the adjustment channel communicates with the outside of the heat dissipation structure, and the other end communicates with the carrying area. Therefore, when the heat dissipation body is coupled to the electronic component by the first heat dissipation material, the adjustment channel can adjust a volume of the first heat dissipation material.

公开(公告)号：US11380978B2

公开(公告)日：2022-07-05

申请号：US15961103

申请日：2018-04-24

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Shi-Min Zhou ,  Han-Hung Chen ,  Rung-Jeng Lin ,  Kuo-Hua Yu ,  Chang-Fu Lin

IPC: H01L23/28 ,  H01Q1/22 ,  H05K1/18 ,  H05K3/36 ,  H05K3/34 ,  H05K3/28 ,  H05K1/14 ,  H05K1/02 ,  H01L23/00

Abstract: An electronic package and a method for fabricating the same are provided. The method includes stacking an antenna board on a circuit board, and disposing between the antenna board and the circuit board a supporting body securing the antenna board and the circuit board. As such, during a packaging process, the distance between the antenna board and the circuit board is kept unchanged due to the supporting body, thus ensuring that the antenna board operates properly and improving the product yield.

公开(公告)号：US20220189900A1

公开(公告)日：2022-06-16

申请号：US17171764

申请日：2021-02-09

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Chia-Yu Kuo ,  Rui-Feng Tai ,  Yih-Jenn Jiang ,  Don-Son Jiang ,  Chang-Fu Lin

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56

Abstract: An electronic package is provided and includes at least one conductor with a relatively large width formed on an electrode pad of an electronic element and in contact with a circuit layer. As such, when the electronic element and the circuit layer deviate in position relative to one another, the circuit layer will be still in contact with the conductor and hence electrically connected to the electronic element.

公开(公告)号：US20220093518A1

公开(公告)日：2022-03-24

申请号：US17108399

申请日：2020-12-01

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Cheng Kai Chang ,  Chang-Fu Lin ,  Don-Son Jiang

IPC: H01L23/538 ,  H01L21/56 ,  H01L25/065 ,  H01L25/00

Abstract: An electronic package is provided, which is disposed with a second electronic component and a third electronic component on a first electronic component as a carrier structure, such that there is no need to match a layout size of the conventional package substrate. Therefore, the first electronic component can be designed as a System on a Chip (SoC) with a smaller size to improve the process yield.

公开(公告)号：US20210343546A1

公开(公告)日：2021-11-04

申请号：US16895461

申请日：2020-06-08

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Yung-Ta Li ,  Yi-Chian Liao ,  Kong-Toon Ng ,  Chang-Fu Lin

IPC: H01L21/56 ,  H01L23/31 ,  H01L21/78 ,  H01L25/065

Abstract: An electronic package and a method for fabricating the same are provided. The electronic package includes a stepped recess formed at a peripheral portion of a packaging module to release stress of the electronic package.

公开(公告)号：US20210320076A1

公开(公告)日：2021-10-14

申请号：US16922169

申请日：2020-07-07

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Yu-Lung Huang ,  Chee-Key Chung ,  Chang-Fu Lin ,  Yuan-Hung Hsu

IPC: H01L23/00

Abstract: Provided is an electronic package, including a first substrate of a first conductive structure and a second substrate of a second conductive structure, where a first conductive layer, a bump body and a metal auxiliary layer of the first conductive structure are sequentially formed on the first substrate, and a metal pillar, a second conductive layer, a metal layer and a solder layer of the second conductive structure are sequentially formed on the second substrate, such that the solder layer is combined with the bump body and the metal auxiliary layer to stack the first substrate and the second substrate. Therefore, the arrangement of the bump body and the metal auxiliary layer allows complete reaction of the IMCs after reflowing the solder layer, and the volume of the conductive structures will not continue to shrink. As such, the problem of cracking of the conductive structures can be effectively averted.