公开(公告)号：US20060110917A1

公开(公告)日：2006-05-25

申请号：US11163055

申请日：2005-10-03

申请人： Shu-Jen Chen ,  Chia-Lin Hsu ,  Kun-Hsien Lin

发明人： Shu-Jen Chen ,  Chia-Lin Hsu ,  Kun-Hsien Lin

IPC分类号： H01L21/44

CPC分类号： H01L21/7684 ,  H01L21/76877

摘要： The method of metallization in the fabrication of an integrated circuit device comprises the steps as follows. First, a dielectric layer overlying a semiconductor substrate is provided. The dielectric layer has a top surface and a plurality of openings. Next, a metal layer is formed on the dielectric layer and filling the openings. Subsequently, a first removing process is performed to partially removing the metal layer. A first annealing process is performed on the metal layer. Finally, a second removing process is performed to remove the metal layer completely to leave the metal layer only within the openings.

摘要翻译： 集成电路器件制造中的金属化方法包括以下步骤。 首先，提供覆盖在半导体衬底上的电介质层。 电介质层具有顶表面和多个开口。 接下来，在电介质层上形成金属层并填充开口。 随后，执行第一去除处理以部分地去除金属层。 在金属层上进行第一退火处理。 最后，进行第二次去除处理，以完全去除金属层，仅将金属层留在开口内。

公开(公告)号：US07368042B2

公开(公告)日：2008-05-06

申请号：US10905361

申请日：2004-12-30

申请人： Chia-Lin Hsu ,  Kun-Hsien Lin ,  Wen-Chieh Su

发明人： Chia-Lin Hsu ,  Kun-Hsien Lin ,  Wen-Chieh Su

IPC分类号： B23H3/02

CPC分类号： C25D17/001 ,  C25D17/12 ,  C25D21/12

摘要： An electro-chemical plating system includes an upper rotor assembly for receiving and holding a wafer; an electroplating reactor vessel for containing plating solution in which the wafer is immersed; an anode array including a plurality of concentric anode segments provided inside the electroplating reactor vessel; a power supply system including power supply subunits for controlling electrical potentials of the anode segments, respectively; and a plurality of sensor devices mounted inside the upper rotor assembly, wherein the sensor devices are substantially arranged in corresponding to the anode segments, and during operation, the plurality of sensor devices are utilized for in-situ feeding back a deposition profile to a control unit in real time.

摘要翻译： 电化学电镀系统包括用于接收和保持晶片的上转子组件; 电镀反应器容器，用于容纳浸有晶片的镀液; 阳极阵列，包括设置在所述电镀反应器容器内部的多个同心阳极段; 电源系统，包括分别用于控制阳极段的电位的电源子单元; 以及安装在上转子组件内部的多个传感器装置，其中传感器装置基本上布置成对应于阳极段，并且在操作期间，多个传感器装置用于将沉积轮廓原位反馈到控制器 单位实时。

公开(公告)号：US20060144698A1

公开(公告)日：2006-07-06

申请号：US10905361

申请日：2004-12-30

申请人： Chia-Lin Hsu ,  Kun-Hsien Lin ,  Wen-Chieh Su

发明人： Chia-Lin Hsu ,  Kun-Hsien Lin ,  Wen-Chieh Su

IPC分类号： B23H3/02 ,  C25B15/00

CPC分类号： C25D17/001 ,  C25D17/12 ,  C25D21/12

摘要： An electro-chemical plating system includes an upper rotor assembly for receiving and holding a wafer; an electroplating reactor vessel for containing plating solution in which the wafer is immersed; an anode array including a plurality of concentric anode segments provided inside the electroplating reactor vessel; a power supply system including power supply subunits for controlling electrical potentials of the anode segments, respectively; and a plurality of sensor devices mounted inside the upper rotor assembly, wherein the sensor devices are substantially arranged in corresponding to the anode segments, and during operation, the plurality of sensor devices are utilized for in-situ feeding back a deposition profile to a control unit in real time.

摘要翻译： 电化学电镀系统包括用于接收和保持晶片的上转子组件; 电镀反应器容器，用于容纳浸有晶片的镀液; 阳极阵列，包括设置在所述电镀反应器容器内部的多个同心阳极段; 电源系统，包括分别用于控制阳极段的电位的电源子单元; 以及安装在上转子组件内部的多个传感器装置，其中传感器装置基本上布置成对应于阳极段，并且在操作期间，多个传感器装置用于将沉积轮廓原位反馈到控制器 单位实时。

公开(公告)号：US20120261770A1

公开(公告)日：2012-10-18

申请号：US13086397

申请日：2011-04-14

申请人： Kun-Hsien Lin ,  Hsin-Fu Huang ,  Tzung-Ying Lee ,  Min-Chuan Tsai ,  Chi-Mao Hsu ,  Chin-Fu Lin

发明人： Kun-Hsien Lin ,  Hsin-Fu Huang ,  Tzung-Ying Lee ,  Min-Chuan Tsai ,  Chi-Mao Hsu ,  Chin-Fu Lin

IPC分类号： H01L29/772

CPC分类号： H01L21/28088 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/7833

摘要： A metal gate structure includes a high-K gate dielectric layer, an N-containing layer, a work function metal layer, and an N-trapping layer. The N-containing layer is positioned between the work function metal layer and the high-K gate dielectric layer. The N-trapping layer is positioned between the work function metal layer and the high-K gate dielectric layer, and the N-trapping layer contains no nitrogen or low-concentration nitrogen.

摘要翻译： 金属栅极结构包括高K栅极电介质层，N含量层，功函数金属层和N-捕获层。 N层位于功函数金属层和高K栅极电介质层之间。 N捕获层位于功函数金属层和高K栅介质层之间，N捕获层不含氮或低浓度氮。

公开(公告)号：US20120250285A1

公开(公告)日：2012-10-04

申请号：US13422972

申请日：2012-03-16

申请人： Pei-Yang Lin ,  Kun-Hsien Lin

发明人： Pei-Yang Lin ,  Kun-Hsien Lin

IPC分类号： H05K9/00 ,  H05K5/00

CPC分类号： H05K9/0084

摘要： An electronic apparatus includes a first casing, a shielding component, a waveguide component and an electronic component. The first casing includes a surface. The shielding component is disposed at the surface. The waveguide component is disposed at the surface and located above the shielding component. The waveguide component and the shielding component are integratedly formed. The electronic component is disposed at the surface and electrically connected to the waveguide component. The electronic apparatus can reduce manufacture cost, labor cost, and the thickness of the display screen.

摘要翻译： 电子设备包括第一壳体，屏蔽部件，波导部件和电子部件。 第一壳体包括表面。 屏蔽部件设置在表面。 波导部件设置在表面并位于屏蔽部件上方。 整体地形成波导部件和屏蔽部件。 电子部件设置在表面并电连接到波导部件。 电子设备可以降低制造成本，人工成本以及显示屏的厚度。

公开(公告)号：US08232601B1

公开(公告)日：2012-07-31

申请号：US13475599

申请日：2012-05-18

申请人： Kun-Hsien Lin ,  Che-Hao Chuang ,  Ryan Hsin-Chin Jiang

发明人： Kun-Hsien Lin ,  Che-Hao Chuang ,  Ryan Hsin-Chin Jiang

IPC分类号： H01L23/62

CPC分类号： H01L29/8613 ,  H01L27/0255 ,  H01L27/0259 ,  H01L29/866

摘要： The present invention relates a transient voltage suppressor (TVS) for directional ESD protection. The TVS includes: a conductivity type substrate; a first type lightly doped region, having a first type heavily doped region arranged therein; a second type lightly doped region, having a second type heavily doped region and a third type heavily doped region arranged therein; a third type lightly doped region, having a fourth type heavily doped region arranged therein; a plurality of closed isolation trenches, arranged on the conductivity type substrate, wherein at least one of the plurality of closed isolation trenches is neighbored one of the type lightly doped regions; and a first pin. Accordingly, the TVS of present invention may adaptively provide effective ESD protection under positive and negative ESD stresses, improve the efficiency of ESD protection within the limited layout area.

摘要翻译： 本发明涉及用于定向ESD保护的瞬态电压抑制器（TVS）。 TVS包括：导电型基板; 第一类型轻掺杂区域，其中布置有第一类型重掺杂区域; 具有第二类型重掺杂区域和布置在其中的第三类型重掺杂区域的第二类型轻掺杂区域; 第三类型轻掺杂区域，其中布置有第四类型重掺杂区域; 多个封闭的隔离沟槽，布置在所述导电型衬底上，其中所述多个闭合隔离沟槽中的至少一个与所述轻掺杂区域中的一个相邻; 和第一个引脚。 因此，本发明的TVS可以在正和负ESD应力下自适应地提供有效的ESD保护，从而在有限的布局区域内提高ESD保护的效率。

公开(公告)号：US08217421B2

公开(公告)日：2012-07-10

申请号：US12840749

申请日：2010-07-21

申请人： Zi-Ping Chen ,  Kun-Hsien Lin ,  Ryan Hsin-Chin Jiang

发明人： Zi-Ping Chen ,  Kun-Hsien Lin ,  Ryan Hsin-Chin Jiang

IPC分类号： H01L29/66

CPC分类号： H01L27/0259

摘要： A new ESD protection device with an integrated-circuit vertical transistor structure is disclosed, which includes a heavily doped p-type substrate (P+ substrate), a n-type well (N well) in the P+ substrate, a heavily doped p-type diffusion (P+ diffusion) in the N well, a heavily doped n-type diffusion (N+ diffusion) in the N well, and a p-type well (P well) surrounding the N well in the P+ substrate. A bond pad is connected to both the P+ and N+ diffusions, and a ground is coupled to the P+ substrate. Another P+ diffusion is implanted in the N well or another N+ diffusion is implanted in the P well to form a Zener diode, which behaves as a trigger for the PNP transistor when a positive ESD zaps. A parasitic diode is formed at the junction between the P+ substrate and the N well, to bypass a negative ESD stress on the bond pad.

摘要翻译： 公开了一种具有集成电路垂直晶体管结构的新型ESD保护器件，其包括重掺杂p型衬底（P +衬底），P +衬底中的n型阱（N阱），重掺杂p型衬底 N阱中的扩散（P +扩散），N阱中的重掺杂n型扩散（N +扩散）以及P +衬底中N阱周围的p型阱（P阱）。 接合焊盘连接到P +和N +扩散两者，并且接地耦合到P +衬底。 将另一个P +扩散注入到N阱中，或者将另一个N +扩散注入到P阱中以形成齐纳二极管，当正ESD成像时，其作为PNP晶体管的触发器。 在P +衬底和N阱之间的接合处形成寄生二极管，以绕过接合焊盘上的负ESD应力。

公开(公告)号：US08193996B2

公开(公告)日：2012-06-05

申请号：US12335585

申请日：2008-12-16

申请人： Chun-Yih Wu ,  Hung-Hsuan Lin ,  Ken-Huang Lin ,  Kun-Hsien Lin ,  Yu-Feng Yeh

发明人： Chun-Yih Wu ,  Hung-Hsuan Lin ,  Ken-Huang Lin ,  Kun-Hsien Lin ,  Yu-Feng Yeh

IPC分类号： H01Q1/42

CPC分类号： H01Q1/42 ,  H01Q1/422 ,  H01Q9/0407 ,  H01Q19/06

摘要： An antenna radome is provided. The antenna radome comprises an antenna radome substrate and a unit cell. The unit cell is formed on a surface of the antenna radome substrate, and the unit cell is perpendicular to a magnetic field direction of an antenna. The unit cell comprises a plurality of conductors.

摘要翻译： 提供天线雷达罩。 天线天线罩包括天线天线罩基板和单元电池。 单位电池形成在天线罩天线罩基板的表面上，并且单位电池垂直于天线的磁场方向。 单元电池包括多个导体。

公开(公告)号：US07989923B2

公开(公告)日：2011-08-02

申请号：US12342118

申请日：2008-12-23

申请人： Tang-Kuei Tseng ,  Kun-Hsien Lin ,  Hsin-Chin Jiang

发明人： Tang-Kuei Tseng ,  Kun-Hsien Lin ,  Hsin-Chin Jiang

IPC分类号： H01L29/167

CPC分类号： H01L29/87

摘要： A bidirectional transient voltage suppression device is disclosed. The bi-directional transient voltage suppression device comprises a semiconductor die. The semiconductor die has a multi-layer structure comprising a semiconductor substrate of a first conductivity type, a buried layer of a second conductivity type, an epitaxial layer, and five diffused regions. The buried layer and the semiconductor substrate form a first semiconductor junction. The first diffused region of the second conductivity type and the semiconductor substrate form a second semiconductor junction. The fourth diffused region of the first conductivity type and the third diffused region of the second conductivity type form a third semiconductor junction. The fifth diffused region of the first conductivity type and the second diffused region of the second conductivity type form a fourth semiconductor junction.

摘要翻译： 公开了一种双向瞬态电压抑制装置。 双向瞬态电压抑制装置包括半导体管芯。 半导体管芯具有包括第一导电类型的半导体衬底，第二导电类型的掩埋层，外延层和五个扩散区域的多层结构。 掩埋层和半导体衬底形成第一半导体结。 第二导电类型的第一扩散区域和半导体衬底形成第二半导体结。 第一导电类型的第四扩散区域和第二导电类型的第三扩散区域形成第三半导体结。 第一导电类型的第五扩散区域和第二导电类型的第二扩散区域形成第四半导体结。

公开(公告)号：US20110013326A1

公开(公告)日：2011-01-20

申请号：US12891474

申请日：2010-09-27

申请人： Ming-Dou Ker ,  Shih-Hung Chen ,  Kun-Hsien Lin

发明人： Ming-Dou Ker ,  Shih-Hung Chen ,  Kun-Hsien Lin

IPC分类号： H02H9/04 ,  H01L27/06

CPC分类号： H01L23/62 ,  H01L27/0262 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device for electrostatic discharge (ESD) protection comprises a silicon controlled rectifier (SCR) including a semiconductor substrate, a first well formed in the substrate, a second well formed in the substrate, a first p-type region formed in the first well to serve as an anode, and a first n-type region partially formed in the second well to serve as a cathode, a p-type metal-oxide-semiconductor (PMOS) transistor formed in the first well including a gate, a first diffused region and a second diffused region separated apart from the first diffused region, a second n-type region formed in the first well electrically connected to the first diffused region of the PMOS transistor, and a second p-type region formed in the substrate electrically connected to the second diffused region of the PMOS transistor.

摘要翻译： 一种用于静电放电（ESD）保护的半导体器件包括可控硅整流器（SCR），其包括半导体衬底，形成在衬底中的第一阱，在衬底中形成的第二阱，形成在第一阱中的第一p型区 用作阳极，以及部分地形成在第二阱中用作阴极的第一n型区域，形成在包括栅极的第一阱中的p型金属氧化物半导体（PMOS）晶体管，第一扩散层 区域和与第一扩散区域分离的第二扩散区域，形成在电连接到PMOS晶体管的第一扩散区域的第一阱中的第二n型区域和形成在衬底中的第二p型区域电连接 到PMOS晶体管的第二扩散区域。