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公开(公告)号：US20120084482A1
公开(公告)日：2012-04-05
申请号：US13244443
申请日：2011-09-24
Applicant: Satoshi Yamanaka , Yoshifumi Kawamura
Inventor： Satoshi Yamanaka , Yoshifumi Kawamura
IPC: G06F13/14
CPC classification number: G06F13/385
Abstract: A communication control function is implemented with limited hardware resources without hampering the extensibility and degrading the processing performance. In an electric control unit coupled to a network bus comprises a reconfiguration module using for processing message received from the network bus. The reconfiguration module is made for configuring the processing circuit in accordance with the message transferred on the network bus to be processed.
Abstract translation: 通过有限的硬件资源实现通信控制功能，而不会妨碍可扩展性并降低处理性能。 在耦合到网络总线的电气控制单元中包括用于处理从网络总线接收的消息的重新配置模块。 重新配置模块用于根据在要处理的网络总线上传送的消息来配置处理电路。
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公开(公告)号：US06798319B2
公开(公告)日：2004-09-28
申请号：US10262909
申请日：2002-10-02
Applicant: Masayoshi Aikawa , Eisuke Nishiyama , Yoshifumi Kawamura , Fumio Asamura , Takeo Oita
Inventor： Masayoshi Aikawa , Eisuke Nishiyama , Yoshifumi Kawamura , Fumio Asamura , Takeo Oita
IPC: H01P120
CPC classification number: H01P1/2013
Abstract: A high-frequency filter for use in a superhigh frequency band such as of microwaves and millimeter waves has a substrate, a metal conductor disposed on a first main surface of the substrate, a resonator comprising a transmission line of a coplanar structure which is made of the metal conductor, and input and output lines disposed on a second main surface of the substrate transversely across the resonator and electromagnetically coupled to the resonator. The resonator may be a coplanar line resonator (coplanar waveguide resonator) or a slot line resonator. The high-frequency filter has a steep attenuating gradient in filter characteristics. The high-frequency filter may be combined with variable-reactance devices such as variable-capacitance diodes for electronically controlling the filter characteristics.
Abstract translation: 用于超高频带（例如微波和毫米波）的高频滤波器具有衬底，布置在衬底的第一主表面上的金属导体，包括共面结构的传输线的谐振器，该共面结构由 金属导体以及布置在基板的第二主表面上的输入和输出线横向地横跨谐振器并且电磁耦合到谐振器。 谐振器可以是共面线谐振器（共面波导谐振器）或缝线谐振器。 高频滤波器在滤波器特性方面具有陡峭的衰减梯度。 高频滤波器可以与用于电子控制滤波器特性的可变电抗器件例如可变电容二极管组合。
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公开(公告)号：US09111649B2
公开(公告)日：2015-08-18
申请号：US13105324
申请日：2011-05-11
Applicant: Yoshifumi Kawamura , Hirofumi Nakano , Hiroyuki Kawai
Inventor： Yoshifumi Kawamura , Hirofumi Nakano , Hiroyuki Kawai
CPC classification number: G11C29/846 , G06F12/0246 , G06F12/1416 , G06F12/1441 , G06F21/79 , G06F2212/7201 , G06F2212/7209
Abstract: There is provided a semiconductor device which is simple in configuration and resistant to tampering. A user input unit receives an authentication code input by a user. A CPU determines whether a user's access is legal based on the input authentication code and activates an enable signal if the user's access is legal. A normal row decoder decodes the row address specified by the CPU and selects a normal memory cell of any row based on the result of decode. A redundancy row decoder prohibits the selection by the normal row decoder when the specified row address agrees with the row address of a predetermined normal memory cell only if the enable signal is activated and selects a redundant memory cell of any row.
Abstract translation: 提供了一种结构简单且易于篡改的半导体器件。 用户输入单元接收用户输入的认证码。 CPU根据输入的认证码确定用户的访问是否合法，如果用户的访问是合法的，则激活启用信号。 正常行解码器对CPU指定的行地址进行解码，并根据解码结果选择任意行的正常存储单元。 当指定的行地址与预定的正常存储单元的行地址一致时，只有在使能信号被激活并且选择任何行的冗余存储单元时，冗余行解码器禁止正常行解码器的选择。
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公开(公告)号：US5619361A
公开(公告)日：1997-04-08
申请号：US182657
申请日：1994-01-18
Applicant: Yasuhiro Sagesaka , Yoshifumi Kawamura , Junichi Tatezaki , Hideo Wada , Isao Kodama , Atsushi Ogane
Inventor： Yasuhiro Sagesaka , Yoshifumi Kawamura , Junichi Tatezaki , Hideo Wada , Isao Kodama , Atsushi Ogane
IPC: H04B10/2507 , H04B10/00 , H04B10/11 , H04B10/116 , H04B10/272 , H04B10/524 , G05B23/02
CPC classification number: H04B10/1149
Abstract: A base station (5) comprises a base transmitter (6) for transmitting information optically to a plurality of portable stations (1 to 4) at such a predetermined time interval as is designated by portable station designating information. Each of the portable stations (1 to 4) comprises a potable transmitter (7) for transmitting information optically to the base station (5) in response to the transmission, which is designated by the portable station designating information coming from said base station (5), and within the range of the aforementioned time interval immediately after said transmission. Transmissions (ACK1 to ACK4) from the mating portable stations to the base station are individually inserted between the interval periods of the transmissions (REQ1 to REQ4) from the base station (5) to the portable stations (1 to 4) so that the single base station performs optical communications with the plurality of portable stations in a half-duplex time sharing manner.
Abstract translation: 基站（5）包括用于以由便携式站指定信息指定的预定时间间隔向多个便携式站（1至4）光学发送信息的基站发射机（6）。 每个便携式站（1至4）包括用于响应于由便携式站指定来自所述基站（5）的信息指定的传输而向基站（5）光学发送信息的便携式发射机（7） ），并且在所述发送之后的上述时间间隔的范围内。 在从基站（5）到便携式站（1至4）的传输的间隔周期（REQ1至REQ4）之间单独插入从配对的便携式站到基站的传输（ACK1至ACK4），使得单个 基站以半双工时分方式与多个便携站进行光通信。
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Patent Agency Ranking
公开(公告)号：US08951801B2
公开(公告)日：2015-02-10
申请号：US13203735
申请日：2010-02-19
Applicant: Shinya Yamanaka , Naoki Goshima , Momoko Maekawa , Yoshifumi Kawamura , Hiromi Mochizuki
Inventor： Shinya Yamanaka , Naoki Goshima , Momoko Maekawa , Yoshifumi Kawamura , Hiromi Mochizuki
CPC classification number: C12N5/0696 , C12N2501/60 , C12N2501/602 , C12N2501/603 , C12N2501/606
Abstract: Reprogramming substances capable of substituting for Klf4, selected from the group consisting of members of the IRX family (e.g., IRX6), members of the GLIS family (e.g., GLIS1), members of the PTX family (e.g., PITX2), DMRTB1, and nucleic acids that encode the same, are provided. Also provided are a method of producing iPS cells, comprising the step of introducing into a somatic cell both one or more kinds of the above-described nuclear reprogramming substances and a substance capable of inducing iPS cells from a somatic cell when combined with Klf4. Still also provided are iPS cells comprising an extraneous nucleic acid that encodes any one of the above-described nuclear reprogramming substances, that can be obtained by the method, and a method of producing somatic cells by inducing the iPS cells to differentiate.
Abstract translation: 能够替代Klf4的重编程物质，选自IRX家族成员（如IRX6），GLIS家族成员（如GLIS1），PTX家族成员（如PITX2），DMRTB1和 提供了编码相同的核酸。 还提供了一种生产iPS细胞的方法，其包括将与上述核重编程物质一种或多种物质一起导入体细胞的步骤，以及当与Klf4组合时能够从体细胞诱导iPS细胞的物质。 还提供了包含编码上述核重编程物质中任一种的外源核酸的iPS细胞，其可以通过该方法获得，以及通过诱导iPS细胞分化来产生体细胞的方法。
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公开(公告)号：US20130029423A1
公开(公告)日：2013-01-31
申请号：US13579234
申请日：2011-02-16
Applicant: Shinya Yamanaka , Naoki Goshima , Momoko Maekawa , Yoshifumi Kawamura , Hiromi Mochizuki
Inventor： Shinya Yamanaka , Naoki Goshima , Momoko Maekawa , Yoshifumi Kawamura , Hiromi Mochizuki
CPC classification number: C12N5/0696 , C12N2501/60 , C12N2501/602 , C12N2501/603 , C12N2501/604 , C12N2510/00
Abstract: Provided are a method of improving the efficiency of establishment of iPS cells, comprising the step of contacting one or more substances selected from the group consisting of members of the GLIS family (e.g., GLIS1) and nucleic acids that encode the same and one or more substances selected from the group consisting of members of the Klf family and nucleic acids that encode the same, with a somatic cell, an iPS cell comprising an exogenous nucleic acid that encodes a member of the GLIS family or a member of the Klf family, that can be obtained by the method, and a method of producing a somatic cell by inducing the differentiation of the iPS cell.
Abstract translation: 提供了提高iPS细胞建立效率的方法，包括使选自GLIS家族成员组（如GLIS1）的一种或多种物质与编码该细胞的核酸和一种或多种 选自Klf家族的成员和编码它们的核酸的物质与体细胞，包含编码GLIS家族成员或Klf家族成员的外源核酸的iPS细胞， 可以通过该方法获得，以及通过诱导iPS细胞的分化来产生体细胞的方法。
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公开(公告)号：US08927277B2
公开(公告)日：2015-01-06
申请号：US13579234
申请日：2011-02-16
Applicant: Shinya Yamanaka , Naoki Goshima , Momoko Maekawa , Yoshifumi Kawamura , Hiromi Mochizuki
Inventor： Shinya Yamanaka , Naoki Goshima , Momoko Maekawa , Yoshifumi Kawamura , Hiromi Mochizuki
CPC classification number: C12N5/0696 , C12N2501/60 , C12N2501/602 , C12N2501/603 , C12N2501/604 , C12N2510/00
Abstract: Provided are a method of improving the efficiency of establishment of iPS cells, comprising the step of contacting one or more substances selected from the group consisting of members of the GLIS family (e.g., GLIS1) and nucleic acids that encode the same and one or more substances selected from the group consisting of members of the Klf family and nucleic acids that encode the same, with a somatic cell, an iPS cell comprising an exogenous nucleic acid that encodes a member of the GLIS family or a member of the Klf family, that can be obtained by the method, and a method of producing a somatic cell by inducing the differentiation of the iPS cell.
Abstract translation: 提供了提高iPS细胞建立效率的方法，包括使选自GLIS家族成员组（如GLIS1）的一种或多种物质与编码该细胞的核酸和一种或多种 选自Klf家族的成员和编码它们的核酸的物质与体细胞，包含编码GLIS家族成员或Klf家族成员的外源核酸的iPS细胞， 可以通过该方法获得，以及通过诱导iPS细胞的分化来产生体细胞的方法。
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公开(公告)号：US20120052583A1
公开(公告)日：2012-03-01
申请号：US13203735
申请日：2010-02-19
Applicant: Shinya Yamanaka , Naoki Goshima , Momoko Maekawa , Yoshifumi Kawamura , Hiromi Mochizuki
Inventor： Shinya Yamanaka , Naoki Goshima , Momoko Maekawa , Yoshifumi Kawamura , Hiromi Mochizuki
CPC classification number: C12N5/0696 , C12N2501/60 , C12N2501/602 , C12N2501/603 , C12N2501/606
Abstract: Reprogramming substances capable of substituting for Klf4, selected from the group consisting of members of the IRX family (e.g., IRX6), members of the GLIS family (e.g., GLIS1), members of the PTX family (e.g., PITX2), DMRTB1, and nucleic acids that encode the same, are provided. Also provided are a method of producing iPS cells, comprising the step of introducing into a somatic cell both one or more kinds of the above-described nuclear reprogramming substances and a substance capable of inducing iPS cells from a somatic cell when combined with Klf4. Still also provided are iPS cells comprising an extraneous nucleic acid that encodes any one of the above-described nuclear reprogramming substances, that can be obtained by the method, and a method of producing somatic cells by inducing the iPS cells to differentiate.
Abstract translation: 能够替代Klf4的重编程物质，选自IRX家族成员（如IRX6），GLIS家族成员（如GLIS1），PTX家族成员（如PITX2），DMRTB1和 提供了编码相同的核酸。 还提供了一种生产iPS细胞的方法，其包括将与上述核重编程物质一种或多种物质一起导入体细胞的步骤，以及当与Klf4组合时能够从体细胞诱导iPS细胞的物质。 还提供了包含编码上述核重编程物质中任一种的外源核酸的iPS细胞，其可以通过该方法获得，以及通过诱导iPS细胞分化来产生体细胞的方法。
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公开(公告)号：US20100153676A1
公开(公告)日：2010-06-17
申请号：US12600716
申请日：2008-05-21
Applicant: Yoshifumi Kawamura
Inventor： Yoshifumi Kawamura
CPC classification number: H03K19/17752 , H03K19/17728 , H03K19/17736 , H03K19/1776
Abstract: A semiconductor device disclosed herein is provided with a plurality of function reconfigurable cells, each comprising a memory circuit and a control circuit, for realizing variable logical functions. A function reconfigurable cell autonomously controls a read address in the memory circuit storing true value data by itself. For example, the control circuit takes feedback input of information that has been read from the data field and control field of the memory circuit synchronously and uses feedback input information from the data field or another information as address information for next synchronous reading of the data field and control field, based on feedback input information from the control field. Because each function reconfigurable cell is capable of autonomous control of reading of the memory circuit storing true value data by itself, it is possible to handle the memory circuit for realizing variable logical functions as a circuit equivalent to a logic circuit. It is thus possible to provide flexibility of logical configurations and scalability that can be realized. Further, it becomes possible to realize variable logical functions that can accommodate a large logical element in a limited chip area occupied for memory.
Abstract translation: 本文公开的半导体器件设置有多个功能可重构单元，每个单元包括用于实现可变逻辑功能的存储器电路和控制电路。 功能可重构单元自主地控制存储电路本身存储真值数据的存储电路中的读地址。 例如，控制电路同步地从存储器电路的数据场和控制域读取的信息的反馈输入，并且使用来自数据场的反馈输入信息或另一信息作为用于数据字段的下一次同步读取的地址信息 并根据控制领域的反馈输入信息进行控制。 因为每个功能可重构单元能够自己控制存储真实值数据的存储电路的读取，所以可以处理用于实现可变逻辑功能的存储电路作为与逻辑电路相当的电路。 因此，可以提供可以实现的逻辑配置和可扩展性的灵活性。 此外，可以实现可容纳存储器占用的有限芯片区域中的大的逻辑元素的可变逻辑功能。
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