公开(公告)号：US20120214308A1

公开(公告)日：2012-08-23

申请号：US13230118

申请日：2011-09-12

Applicant: Satoshi INADA ,  Mitsuhiro OMURA ,  Hisataka HAYASHI

Inventor： Satoshi INADA ,  Mitsuhiro OMURA ,  Hisataka HAYASHI

IPC: H01L21/308

CPC classification number: H01L21/32139 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  G03F7/038 ,  G03F7/039 ,  G03F7/095 ,  H01L21/0273

Abstract: An aspect of the present embodiment, there is provided a method of fabricating a semiconductor device including providing a film to be processed above a semiconductor substrate, providing a negative-type resist and a photo-curable resist in order, pressing a main surface of a template onto the photo-curable resist, the main surface of the template having a concavo-convex pattern with a light shield portion provided on at least a part of a convex portion, irradiating the template with light from a back surface of the template, developing the negative-type resist and the photo-curable resist so as to print the concavo-convex pattern of the template on the negative-type resist and the photo-curable resist, and etching the film to be processed by using the concavo-convex pattern printed on the negative-type resist and the photo-curable resist as a mask.

Abstract translation: 本实施例的一个方面提供一种制造半导体器件的方法，该半导体器件包括在半导体衬底上提供待加工的膜，依次提供负型抗蚀剂和可光固化抗蚀剂， 模板到可光固化抗蚀剂上，模板的主表面具有凹凸图案，具有设置在凸部的至少一部分上的遮光部分，用来自模板背面的光照射模板，显影 负型抗蚀剂和光固化型抗蚀剂，以便在负型抗蚀剂和可光固化抗蚀剂上印刷模板的凹凸图案，并通过使用凹凸图案来蚀刻待处理的薄膜 印刷在负型抗蚀剂和可光固化抗蚀剂上作为掩模。

公开(公告)号：US20080138995A1

公开(公告)日：2008-06-12

申请号：US11927080

申请日：2007-10-29

Applicant: Mitsuhiro OMURA

Inventor： Mitsuhiro OMURA

IPC: H01L21/302

CPC classification number: H01L21/31144 ,  H01J37/32091 ,  H01J37/32174 ,  H01J2237/334

Abstract: A manufacturing method of a semiconductor device using a semiconductor manufacturing unit comprising a reaction chamber, a substrate mounting stage, and a high frequency power supply coupled to the substrate mounting stage, a blocking capacitor interposed between the substrate mounting stage and the high-frequency power supply to continuously perform a plurality of dry etching processing with respect to the same substrate in the same reaction chamber, the method includes: disposing a substrate on a substrate mounting stage, and applying high-frequency powers to the substrate mounting stage while introducing a fluorocarbon-based first gas to perform a first dry etching processing with respect to the substrate, the substrate including an organic material film and a silicon compound film sequentially deposited on a surface thereof and a resist film patterned on the silicon compound film, the first dry etching processing including processing the silicon compound film with the resist film being used as a mask; and stopping application of one of the high-frequency powers, thereby reducing a bias voltage generated to the substrate while introducing a second gas after the first dry etching processing to remove a fluorocarbon-based deposition in the reaction chamber and perform a second dry etching processing with respect to the substrate.

Abstract translation: 一种使用半导体制造单元的半导体器件的制造方法，该半导体制造单元包括反应室，衬底安装级和耦合到衬底安装级的高频电源，插入在衬底安装级和高频电源之间的隔离电容器 供给在相同的反应室中连续进行相同的基板的多次干蚀刻处理，该方法包括：将基板设置在基板安装台上，并在引入碳氟化合物的同时向基板安装台施加高频电力 的第一气体进行相对于衬底的第一干蚀刻处理，所述衬底包括顺序沉积在其表面上的有机材料膜和硅化合物膜以及在硅化合物膜上图案化的抗蚀剂膜，第一干蚀刻 包括用抗蚀剂膜b处理硅化合物膜的处理 用作面具; 并且停止施加高频电源之一，从而在第一次干法蚀刻处理之后引入第二气体减少对基板产生的偏置电压，以去除反应室中的基于碳氟化合物的沉积，并进行第二次干蚀刻处理 相对于基板。

公开(公告)号：US20090163030A1

公开(公告)日：2009-06-25

申请号：US12336348

申请日：2008-12-16

Applicant: Mitsuhiro OMURA ,  Keisuke Kikutani ,  Yutaka Okamoto

Inventor： Mitsuhiro OMURA ,  Keisuke Kikutani ,  Yutaka Okamoto

IPC: H01L21/311

CPC classification number: H01L21/31144 ,  H01L21/0337 ,  H01L21/31116 ,  H01L21/31138

Abstract: A first silicon containing film, an organic material film, a second silicon containing film are formed. The second silicon containing film is patterned to have a narrow width pattern and a wide width pattern. The organic material film is patterned to have a narrow width pattern and a wide width pattern. A side wall is formed on a side surface of the second silicon containing film and the organic material film by coating with a third silicon containing film. The narrow width pattern of the second silicon containing film is removed by using a mask that covers the second silicon containing film patterned to have a wide width pattern and the side wall. Finally, the organic material film is removed.

Abstract translation: 形成第一含硅膜，有机材料膜，第二含硅膜。 将第二含硅膜图案化为具有窄的宽度图案和宽的宽度图案。 有机材料膜被图案化以具有窄的宽度图案和宽的宽度图案。 通过涂覆第三含硅膜，在第二含硅膜和有机材料膜的侧表面上形成侧壁。 通过使用覆盖图案化的第二含硅膜具有宽幅图案和侧壁的掩模来除去第二含硅膜的窄幅图案。 最后，除去有机材料膜。

公开(公告)号：US20090305497A1

公开(公告)日：2009-12-10

申请号：US12425789

申请日：2009-04-17

Applicant: Mitsuhiro OMURA

Inventor： Mitsuhiro OMURA

IPC: H01L21/3205 ,  H01L21/302

CPC classification number: H01L21/0337 ,  H01L21/823437 ,  H01L27/1052

Abstract: A method for fabricating a semiconductor device, includes: forming a first film pattern above a substrate; forming a plurality of second film patterns like sandwiching the first film pattern from both sides; forming a third film in such a way that an upper surface of the first film pattern and an upper surface and an exposed side surface of each of the plurality of second film patterns are coated with the third film; removing a portion of the third film until the upper surface of the first film pattern is exposed; removing, by a wet process, the first film pattern exposed after the portion of the third film is removed; and removing a remainder of the third film by a dry process after the first film pattern is removed.

Abstract translation: 一种制造半导体器件的方法，包括：在衬底上形成第一膜图案; 形成多个第二膜图案，从两侧夹着第一膜图案; 以第一膜图案的上表面和多个第二膜图案中的每一个的上表面和暴露侧表面涂覆第三膜的方式形成第三膜; 去除第三膜的一部分直到第一膜图案的上表面露出; 通过湿法除去在除去第三膜的部分之后暴露的第一膜图案; 并且在除去第一膜图案之后通过干法除去第三膜的剩余部分。

公开(公告)号：US20120021605A1

公开(公告)日：2012-01-26

申请号：US13013380

申请日：2011-01-25

Applicant: Mitsuhiro OMURA ,  Yumi Ohno ,  Takaya Matsushita ,  Tokuhisa Ohiwa

Inventor： Mitsuhiro OMURA ,  Yumi Ohno ,  Takaya Matsushita ,  Tokuhisa Ohiwa

IPC: H01L21/475 ,  H01L21/4757

CPC classification number: H01L21/31116 ,  H01L21/0273 ,  H01L21/31144 ,  H01L21/32139

Abstract: In a semiconductor device producing method according to one embodiment, an insulating film containing silicon is formed on a semiconductor substrate, a resist is deposited on the insulating film, the resist is patterned into a predetermined pattern, and the insulating film is processed by a dry etching treatment in which gas containing C, F, Br, H, and O is used with the resist having the predetermined pattern as a mask. A deposited film in which C and Br are coupled is produced on the resist.

Abstract translation: 在根据一个实施例的半导体器件制造方法中，在半导体衬底上形成含有硅的绝缘膜，在绝缘膜上沉积抗蚀剂，将抗蚀剂图案化成预定图案，并且通过干燥 蚀刻处理，其中使用含有C，F，Br，H和O的气体，其中具有预定图案的抗蚀剂作为掩模。 在抗蚀剂上制造其中C和Br连接的沉积膜。

公开(公告)号：US20100176440A1

公开(公告)日：2010-07-15

申请号：US12615120

申请日：2009-11-09

Applicant: Mitsuhiro OMURA

Inventor： Mitsuhiro OMURA

IPC: H01L29/792 ,  H01L21/336 ,  H01L21/3205

CPC classification number: H01L27/11578 ,  H01L27/11575 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/792

Abstract: A semiconductor device includes: a first layer; a second layer; a columnar structural unit; and a side portion. The second layer is provided on a major surface of the first layer. The columnar structural unit is conductive and aligned in the first layer and the second layer to pass through the major surface. The side portion is added to a side wall of the columnar structural unit on the second layer side of the major surface.

Abstract translation: 半导体器件包括：第一层; 第二层; 柱状结构单元; 和侧部。 第二层设置在第一层的主表面上。 柱状结构单元是导电的并且在第一层和第二层中对准以通过主表面。 侧面部分被添加到主表面的第二层侧上的柱状结构单元的侧壁。

公开(公告)号：US20090096007A1

公开(公告)日：2009-04-16

申请号：US12244523

申请日：2008-10-02

Applicant: Mitsuhiro OMURA ,  Satoshi NAGASHIMA ,  Katsunori YAHASHI ,  Jungo INABA ,  Daina INOUE

Inventor： Mitsuhiro OMURA ,  Satoshi NAGASHIMA ,  Katsunori YAHASHI ,  Jungo INABA ,  Daina INOUE

IPC: H01L29/788 ,  H01L21/28

CPC classification number: H01L27/115 ,  H01L27/11521 ,  H01L27/11524

Abstract: A semiconductor memory device comprises a plurality of transistors having a stacked-gate structure. Each transistor includes a semiconductor substrate, a gate insulator formed on the semiconductor substrate, a lower gate formed on the semiconductor substrate with the gate insulator interposed, an intergate insulator formed on the lower gate, and an upper gate formed and silicided on the lower gate with the intergate insulator interposed. A portion of the transistors has an aperture formed through the intergate insulator to connect the lower gate with the upper gate and further includes a block film composed of an insulator and formed smaller than the upper gate and larger than the aperture above the upper gate to cover the aperture.

Abstract translation: 半导体存储器件包括具有层叠栅结构的多个晶体管。 每个晶体管包括半导体衬底，形成在半导体衬底上的栅极绝缘体，形成在半导体衬底上的栅极绝缘体插入的下栅极，形成在下栅极上的栅极绝缘体和在下栅极上形成并硅化的上栅极 间隔绝缘体插入。 晶体管的一部分具有通过栅极间绝缘体形成的孔，以将下栅极与上栅极连接，并且还包括由绝缘体构成并形成为小于上栅极且大于上栅极上方的孔的阻挡膜以覆盖 光圈。