Abstract:
A method of fabricating a semiconductor device includes forming, in a semiconductor substrate, a device isolation trench defining active regions, forming a first liner dielectric layer covering a top surface of the semiconductor substrate and an inner wall of the device isolation trench, forming a second liner dielectric layer covering the first liner dielectric layer, forming a buried dielectric layer filling the device isolation trench, performing a polishing process on the second liner dielectric layer and the buried dielectric layer to form a device isolation structure, forming a mask pattern running across the active regions, and partially patterning the active regions and the device isolation structure to form gate trenches. After the polishing process, the first liner dielectric layer, the second liner dielectric layer, and the buried dielectric layer have their top surfaces formed by the polishing process coplanar with each other.
Abstract:
Probe card transfer units and probe card management apparatuses including the same may be provided. The transfer unit includes a hand part including grippers holding a package and a moving part moving the hand part. Each of the grippers includes at least one locking pin protruding from a holding bar, which extends in a direction perpendicular to the holding bar, to securely hold the package.
Abstract:
A loading apparatus is provided which includes a package jig, a transfer unit, and a load port. The package jig is fixed to a package. The transfer unit includes a hand for holding the package jig and transferring the package. The package transferred by the transfer unit is loaded on the load port. The load port and the hand include first alignment pins and first alignment sockets for aligning the package to the load port.
Abstract:
A manufacturing method of a semiconductor device includes: etching a substrate, thereby forming a cell trench and a dummy trench; forming a preliminary isolation structure on the substrate, wherein a first dummy recess is formed in the preliminary isolation structure and overlaps with the dummy trench; forming a lower mask layer on the preliminary isolation structure, wherein a second dummy recess is formed in the lower mask layer and overlaps with the first dummy recess; forming a dummy recess filling pattern filling the second dummy recess; forming an upper mask layer on the lower mask layer and the dummy recess filling pattern; forming a gate trench using the lower mask layer and the upper mask layer as a mask; and forming a gate structure in the gate trench.