公开(公告)号：US20210362198A1

公开(公告)日：2021-11-25

申请号：US17081855

申请日：2020-10-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YONGHEE LEE ,  BYOUNGHO KWON ,  KUNTACK LEE

IPC: B08B1/00 ,  B08B13/00 ,  B08B1/04 ,  B08B3/04 ,  A46B13/00 ,  A46B13/02

Abstract: A substrate-cleaning apparatus may include a tilting arm to which a roll brush and a motor are coupled, a support arm positioned on the tilting arm, a first spring and a second spring coupling the tilting arm to the support arm, a first air bag and a second air bag mounted between the tilting arm and the support arm, and a controller configured to adjust an internal pressure of each of the first air bag and the second air bag. The controller may adjust a difference in internal pressure between the first air bag and the second air bag to control the inclination of the roll brush, and may adjust the internal pressure of each of the first air bag and the second air bag to move the roll brush vertically.

公开(公告)号：US20240332059A1

公开(公告)日：2024-10-03

申请号：US18390026

申请日：2023-12-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngin KIM ,  BYOUNGHO KWON ,  Yeil KIM ,  JONGHYUK PARK ,  JIN-WOO BAE ,  KYOUNGJOON SONG ,  MYUNGJAE JANG ,  Byungsoo JOO

IPC: H01L21/762 ,  H01L21/306 ,  H01L21/308 ,  H01L21/768

CPC classification number: H01L21/762 ,  H01L21/30625 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/76831 ,  H01L21/76832

Abstract: A method of fabricating a semiconductor device includes forming, in a semiconductor substrate, a device isolation trench defining active regions, forming a first liner dielectric layer covering a top surface of the semiconductor substrate and an inner wall of the device isolation trench, forming a second liner dielectric layer covering the first liner dielectric layer, forming a buried dielectric layer filling the device isolation trench, performing a polishing process on the second liner dielectric layer and the buried dielectric layer to form a device isolation structure, forming a mask pattern running across the active regions, and partially patterning the active regions and the device isolation structure to form gate trenches. After the polishing process, the first liner dielectric layer, the second liner dielectric layer, and the buried dielectric layer have their top surfaces formed by the polishing process coplanar with each other.

公开(公告)号：US20220093391A1

公开(公告)日：2022-03-24

申请号：US17336924

申请日：2021-06-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： YEONGBONG PARK ,  JISU KIM ,  BYOUNGHO KWON

IPC: H01L21/02 ,  H01L21/306 ,  B08B3/02 ,  B08B3/08 ,  B08B3/04 ,  B08B1/00 ,  B08B1/04 ,  B08B1/02 ,  B24B37/34 ,  B05B1/14

Abstract: A method of processing a substrate may include preparing the substrate, polishing the substrate, and cleaning the substrate using a double nozzle, which is configured to provide a spray and a chemical solution onto the substrate. The spray may include a deionized water, and the chemical solution may be diluted with the deionized water. The chemical solution and the spray may be spaced apart from each other by a distance of 7 cm to 12 cm.