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    Coarse-grained reconfigurable processor and code decompression method thereof
    1.
    发明授权
    Coarse-grained reconfigurable processor and code decompression method thereof 有权
    粗粒度可重构处理器及其代码解压缩方法

    公开(公告)号：US09348792B2

    公开(公告)日：2016-05-24

    申请号：US13892603

    申请日：2013-05-13

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Moo-Kyoung Chung ,  Yeon-Gon Cho ,  Soo-Jung Ryu

    IPC: G06F15/78 ,  H03M7/30

    CPC classification number: G06F15/7867 ,  H03M7/30 ,  Y02D10/12 ,  Y02D10/13

    Abstract: A coarse-grained reconfigurable processor having an improved code compression rate and a code decompression method thereof are provided to reduce a capacity of a configuration memory and reduce power consumption in a processor chip. The coarse-grained reconfigurable processor includes a configuration memory configured to store reconfiguration information including a header storing a compression mode indicator and a compressed code for each of a plurality of units and a body storing at least one uncompressed code, a decompressor configured to specify a code corresponding to each of the plurality of units among the at least one uncompressed code within the body based on the compression mode indicator and the compressed code within the header, and a reconfigurator including a plurality of PEs and configured to reconfigure data paths of the plurality of PEs based on the code corresponding to each unit.

    Abstract translation: 提供具有改进的代码压缩率和代码解压缩方法的粗粒度可重构处理器以减少配置存储器的容量并降低处理器芯片中的功耗。 粗粒度可重配置处理器包括：配置存储器，被配置为存储重新配置信息，包括存储多个单元中的每一个的压缩模式指示符和压缩代码的头部，以及存储至少一个未压缩代码的主体;解压缩器，被配置为指定 基于所述标题内的所述压缩模式指示符和所述压缩码，所述对应于所述身体内的所述至少一个未压缩码中的所述多个单元中的每一个的代码，以及包括多个PE的重新配置，并且被配置为重新配置所述多个PE中的数据路径 基于与每个单元相对应的代码。

    Job scheduling apparatus and job scheduling method thereof to assign jobs to a core
    2.
    发明授权
    Job scheduling apparatus and job scheduling method thereof to assign jobs to a core 有权
    作业调度装置及其作业调度方法将作业分配给核心

    公开(公告)号：US09274845B2

    公开(公告)日：2016-03-01

    申请号：US14606395

    申请日：2015-01-27

    Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  Korea Advanced Institute of Science and Technology

    Inventor： Woong Seo ,  Yeon-Gon Cho ,  Soo-Jung Ryu ,  Seok-Woo Song ,  John Dongjun Kim ,  Min-Seok Lee

    IPC: G06F9/46 ,  G06F9/50

    CPC classification number: G06F9/505 ,  G06F9/46 ,  G06F9/4881 ,  G06F2209/5022

    Abstract: An apparatus and a job scheduling method are provided. For example, the apparatus is a multi-core processing apparatus. The apparatus and method minimize performance degradation of a core caused by sharing resources by dynamically managing a maximum number of jobs assigned to each core of the apparatus. The apparatus includes at least one core including an active cycle counting unit configured to store a number of active cycles and a stall cycle counting unit configured to store a number of stall cycles and a job scheduler configured to assign at least one job to each of the at least one core, based on the number of active cycles and the number of stall cycles. When the ratio of the number of stall cycles to a number of active cycles for a core is too great, the job scheduler assigns fewer jobs to that core to improve performance.

    Abstract translation: 提供了一种装置和作业调度方法。 例如，该装置是多核处理装置。 该装置和方法通过动态地管理分配给设备的每个核心的最大数量的作业来最小化共享资源所引起的核心性能下降。 所述设备包括至少一个核心，其包括被配置为存储多个活动周期的活动周期计数单元和被配置为存储多个失速周期的失速循环计数单元，以及作业调度器，其被配置为将至少一个作业分配给 至少一个核心，基于活动周期的数量和失速周期的数量。 当停顿周期数与核心的活动周期数之比太大时，作业调度程序为该核心分配较少的作业以提高性能。

    APPARATUS AND METHOD FOR PERFORMING TILE-BASED RENDERING USING PREFETCHED GRAPHICS DATA
    4.
    发明申请
    APPARATUS AND METHOD FOR PERFORMING TILE-BASED RENDERING USING PREFETCHED GRAPHICS DATA 审中-公开

    公开(公告)号：US20190197760A1

    公开(公告)日：2019-06-27

    申请号：US16111608

    申请日：2018-08-24

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Yeon-Gon Cho ,  Woong Seo

    IPC: G06T15/00 ,  G06T17/20

    Abstract: A graphics processing unit (GPU), configured to perform tile-based rendering using prefetched graphics data, includes a tiler configured to perform binning on a current frame and obtain a first binning bitstream of a first tile among a plurality of tiles of the current frame, a binning correlator configured to determine whether the first tile and a second tile of a previous frame are similar to each other by using the first binning bitstream and a second binning bitstream of the second tile, where the second tile has a same tile ID as the first tile, a prefetcher configured to prefetch second graphics data used to render the second tile by using the tile ID, when it is determined that the first tile and the second tile are similar to each other, and at least one processor configured to render the current frame using the prefetched second graphics data.

    Functional unit for supporting multithreading, processor comprising the same, and operating method thereof
    5.
    发明授权
    Functional unit for supporting multithreading, processor comprising the same, and operating method thereof 有权

    公开(公告)号：US09858116B2

    公开(公告)日：2018-01-02

    申请号：US14542827

    申请日：2014-11-17

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Yeon-Gon Cho ,  Soo-jung Ryu

    IPC: G06F9/46 ,  G06F9/48 ,  G06F9/38

    CPC classification number: G06F9/4881 ,  G06F9/3851 ,  G06F9/3891 ,  G06F9/466

    Abstract: A functional unit for supporting multithreading, a processor including the same, and an operating method of the processor are provided. The functional unit for supporting multithreading includes a plurality of input ports configured to receive opcodes and operands for a plurality of threads, wherein each of the plurality of input ports is configured to receive an opcode and an operand for a different thread, a plurality of operators configured to perform operations using the received operands, an operator selector configured to select, based on each opcode, an operator from among the plurality of operators to perform a specific operation using an operand from among the received operands, and a plurality of output ports configured to output operation results of operations for each thread.

    Apparatus and method for performing tile-based rendering using prefetched graphics data
    6.
    发明授权
    Apparatus and method for performing tile-based rendering using prefetched graphics data 有权

    公开(公告)号：US10769837B2

    公开(公告)日：2020-09-08

    申请号：US16111608

    申请日：2018-08-24

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Yeon-Gon Cho ,  Woong Seo

    IPC: G06T15/00 ,  G06T15/04

    Abstract: A graphics processing unit (GPU), configured to perform tile-based rendering using prefetched graphics data, includes a tiler configured to perform binning on a current frame and obtain a first binning bitstream of a first tile among a plurality of tiles of the current frame, a binning correlator configured to determine whether the first tile and a second tile of a previous frame are similar to each other by using the first binning bitstream and a second binning bitstream of the second tile, where the second tile has a same tile ID as the first tile, a prefetcher configured to prefetch second graphics data used to render the second tile by using the tile ID, when it is determined that the first tile and the second tile are similar to each other, and at least one processor configured to render the current frame using the prefetched second graphics data.

    Texture processing method and device
    7.
    发明授权
    Texture processing method and device 有权

    公开(公告)号：US10733764B2

    公开(公告)日：2020-08-04

    申请号：US15622927

    申请日：2017-06-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sang-Heon Lee ,  Yeon-Gon Cho ,  Soo-Jung Ryu

    IPC: G06K9/36 ,  G06K9/46 ,  G06T9/00 ,  G06T1/20 ,  G06T11/00

    Abstract: A texture processing method and apparatus that obtains information about a first data loss amount that occurred during a texture compression process. A determination is made regarding a second data loss amount that allowable during a texture filtering process based on the obtained information regarding the first data loss amount. Texture filtering is then performed by using the second data loss amount. At least one processor determines the second data loss amount based on a difference between the third data loss amount and the first data loss amount.

    TEXTURE PROCESSING METHOD AND DEVICE
    9.
    发明申请
    TEXTURE PROCESSING METHOD AND DEVICE 审中-公开

    公开(公告)号：US20180144506A1

    公开(公告)日：2018-05-24

    申请号：US15622927

    申请日：2017-06-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sang-Heon Lee ,  Yeon-Gon Cho ,  Soo-Jung Ryu

    IPC: G06T9/00 ,  G06T11/00 ,  G06T1/20

    Abstract: A texture processing method and apparatus that obtains information about a first data loss amount that occurred during a texture compression process. A determination is made regarding a second data loss amount that allowable during a texture filtering process based on the obtained information regarding the first data loss amount. Texture filtering is then performed by using the second data loss amount. At least one processor determines the second data loss amount based on a difference between the third data loss amount and the first data loss amount.

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