公开(公告)号：US11776644B2

公开(公告)日：2023-10-03

申请号：US17591987

申请日：2022-02-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minho Choi ,  Jaeseong Lim ,  Kyungryun Kim ,  Daehyun Kim ,  Wonil Bae ,  Hohyun Shin ,  Sanghoon Jung ,  Hyongryol Hwang

IPC: G11C17/18 ,  G11C29/08 ,  G11C17/16

CPC classification number: G11C17/18 ,  G11C17/16 ,  G11C29/08

Abstract: A voltage trimming circuit including: a first resistance circuit having a first resistance value determined by up codes and down codes; a second resistance circuit having a second resistance value determined by the up codes and the down codes; and a comparator to output a voltage detection signal by comparing a voltage level of a reference voltage trimming node to that of a feedback node, wherein the voltage detection signal adjusts the up and down codes, which increase the first resistance value and decrease the second resistance value when the voltage level of the reference voltage trimming node is higher than that of the feedback node, and adjusts the up and down codes, which decrease the first resistance value and increase the second resistance value when the voltage level of the reference voltage trimming node is lower than that of the feedback node.

公开(公告)号：US11574671B2

公开(公告)日：2023-02-07

申请号：US17346633

申请日：2021-06-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seungki Hong ,  Wonil Bae ,  Heonsu Jeong

IPC: G11C11/34 ,  G11C16/06 ,  G11C11/4091 ,  G11C11/408 ,  G11C7/10 ,  G11C11/406 ,  G11C11/4094

Abstract: A semiconductor memory device and a memory system are provided. The semiconductor memory device includes a fingerprint read signal generator configured to generate a fingerprint read signal in response to a refresh counting control signal, a memory cell array comprising a plurality of sub memory cell array blocks, a fingerprint output unit configured to receive data output from memory cells connected to one selected among a plurality of word lines and one selected among a plurality of bit lines of one among the plurality of sub memory cell array blocks in response to the fingerprint read signal to generate fingerprint data, and a pseudorandom number generator configured to perform a linear feedback shifting operation in response to an active command to generate sequence data, receive the fingerprint data in response to the fingerprint read signal, and generate the sequence data based on the fingerprint data.

公开(公告)号：US12062404B2

公开(公告)日：2024-08-13

申请号：US18239548

申请日：2023-08-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minho Choi ,  Jaeseong Lim ,  Kyungryun Kim ,  Daehyun Kim ,  Wonil Bae ,  Hohyun Shin ,  Sanghoon Jung ,  Hyongryol Hwang

IPC: G11C17/18 ,  G11C17/16 ,  G11C29/08

CPC classification number: G11C17/18 ,  G11C17/16 ,  G11C29/08

Abstract: A voltage trimming circuit including: a first resistance circuit having a first resistance value determined by up codes and down codes; a second resistance circuit having a second resistance value determined by the up codes and the down codes; and a comparator to output a voltage detection signal by comparing a voltage level of a reference voltage trimming node to that of a feedback node, wherein the voltage detection signal adjusts the up and down codes, which increase the first resistance value and decrease the second resistance value when the voltage level of the reference voltage trimming node is higher than that of the feedback node, and adjusts the up and down codes, which decrease the first resistance value and increase the second resistance value when the voltage level of the reference voltage trimming node is lower than that of the feedback node.

公开(公告)号：US20230410925A1

公开(公告)日：2023-12-21

申请号：US18239548

申请日：2023-08-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minho Choi ,  Jaeseong Lim ,  Kyungryun Kim ,  Daehyun Kim ,  Wonil Bae ,  Hohyun Shin ,  Sanghoon Jung ,  Hyongryol Hwang

IPC: G11C17/18 ,  G11C29/08 ,  G11C17/16

CPC classification number: G11C17/18 ,  G11C17/16 ,  G11C29/08

Abstract: A voltage trimming circuit including: a first resistance circuit having a first resistance value determined by up codes and down codes; a second resistance circuit having a second resistance value determined by the up codes and the down codes; and a comparator to output a voltage detection signal by comparing a voltage level of a reference voltage trimming node to that of a feedback node, wherein the voltage detection signal adjusts the up and down codes, which increase the first resistance value and decrease the second resistance value when the voltage level of the reference voltage trimming node is higher than that of the feedback node, and adjusts the up and down codes, which decrease the first resistance value and increase the second resistance value when the voltage level of the reference voltage trimming node is lower than that of the feedback node.

公开(公告)号：US20220284975A1

公开(公告)日：2022-09-08

申请号：US17591987

申请日：2022-02-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minho Choi ,  Jaeseong Lim ,  Kyungryun Kim ,  Daehyun Kim ,  Wonil Bae ,  Hohyun Shin ,  Sanghoon Jung ,  Hyongryol Hwang

IPC: G11C17/18 ,  G11C17/16 ,  G11C29/08

Abstract: A voltage trimming circuit including: a first resistance circuit having a first resistance value determined by up codes and down codes; a second resistance circuit having a second resistance value determined by the up codes and the down codes; and a comparator to output a voltage detection signal by comparing a voltage level of a reference voltage trimming node to that of a feedback node, wherein the voltage detection signal adjusts the up and down codes, which increase the first resistance value and decrease the second resistance value when the voltage level of the reference voltage trimming node is higher than that of the feedback node, and adjusts the up and down codes, which decrease the first resistance value and increase the second resistance value when the voltage level of the reference voltage trimming node is lower than that of the feedback node.