公开(公告)号：US10147739B2

公开(公告)日：2018-12-04

申请号：US15591659

申请日：2017-05-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung-Min Hwang ,  Han-Soo Kim ,  Won-Seok Cho ,  Jae-Hoon Jang

IPC: H01L27/11582 ,  H01L27/11578 ,  H01L21/265 ,  H01L21/285 ,  H01L21/306 ,  H01L21/768 ,  H01L29/66 ,  G11C16/04

Abstract: Provided is a vertical non-volatile memory device having a metal source line. The vertical non-volatile memory device includes cell string units that are formed on first portions of a semiconductor substrate and are vertically arranged with respect to a surface of the semiconductor substrate, impurity regions formed on second portions of the semiconductor substrate between the cell string units, conductive lines formed on the impurity regions, and spacers that are formed on the sidewalls of the cell string units and insulate the conductive lines from the cells string units.

公开(公告)号：US09299716B2

公开(公告)日：2016-03-29

申请号：US14790724

申请日：2015-07-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Min Hwang ,  Han-Soo Kim ,  Woon-Kyung Lee ,  Won-Seok Cho

IPC: H01L29/792 ,  H01L27/115 ,  H01L29/66

CPC classification number: H01L27/1157 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

Abstract: A method of manufacturing a vertical type memory device includes stacking a first lower insulating layer, one layer of a lower sacrificial layer and a second lower insulating layer on a substrate, forming a stacking structure by stacking sacrificial layers and insulating layers, and etching an edge portion of the stacking structure to form a preliminary stepped shape pattern structure. The preliminary stepped shape pattern structure has a stepped shape edge portion. A pillar structure making contact with a surface of the substrate is formed. The preliminary stepped shape pattern structure, the lower sacrificial layer, and the first and second lower insulating layers are partially etched to form a first opening portion and a second opening portion to form a stepped shape pattern structure. The second opening portion cuts at least an edge portion of the lower sacrificial layer.

公开(公告)号：US20170243885A1

公开(公告)日：2017-08-24

申请号：US15591659

申请日：2017-05-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNG-MIN HWANG ,  Han-Soo Kim ,  Won-Seok Cho ,  Jae-Hoon Jang

IPC: H01L27/11582 ,  H01L21/285 ,  H01L21/306 ,  H01L21/265

CPC classification number: H01L27/11582 ,  G11C16/0483 ,  H01L21/265 ,  H01L21/28518 ,  H01L21/30604 ,  H01L21/768 ,  H01L27/11578 ,  H01L29/6656

Abstract: Provided is a vertical non-volatile memory device having a metal source line. The vertical non-volatile memory device includes cell string units that are formed on first portions of a semiconductor substrate and are vertically arranged with respect to a surface of the semiconductor substrate, impurity regions formed on second portions of the semiconductor substrate between the cell string units, conductive lines formed on the impurity regions, and spacers that are formed on the sidewalls of the cell string units and insulate the conductive lines from the cells string units.

公开(公告)号：US09711188B2

公开(公告)日：2017-07-18

申请号：US15141967

申请日：2016-04-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung-Min Hwang ,  Han-Soo Kim ,  Won-Seok Cho ,  Jae-Hoon Jang ,  Sun-Il Shim ,  Jae-Hun Jeong ,  Ki-Hyun Kim

IPC: H01L27/112 ,  G11C5/06 ,  H01L27/115 ,  H01L27/11517

CPC classification number: G11C5/06 ,  H01L23/5283 ,  H01L27/112 ,  H01L27/115 ,  H01L27/11517

Abstract: A vertical non-volatile memory device includes a substrate, and a first stack of word lines and a second stack of word lines extending in a first direction on the substrate and separated from each other in a second direction perpendicular to the first direction. The device further includes first array lines extending in the second direction on the first and the second stack, and connected to word lines of the first and the second stack through at least two of first via contacts in a same level. The device further include first word select lines being in a same level and extending in the first direction, and connected to each of the first array lines through at least one of second via contacts. Ends of each of the first and the second stack have a form of stairs on the substrate.

公开(公告)号：US09966115B2

公开(公告)日：2018-05-08

申请号：US15586002

申请日：2017-05-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung-Min Hwang ,  Han-Soo Kim ,  Won-Seok Cho ,  Jae-Hoon Jang ,  Sun-Il Shim ,  Jae-Hun Jeong ,  Ki-Hyun Kim

IPC: H01L27/115 ,  G11C5/06 ,  H01L23/528

CPC classification number: G11C5/06 ,  H01L23/5283 ,  H01L27/112 ,  H01L27/115 ,  H01L27/11517

Abstract: A vertical non-volatile memory device includes a substrate, and a first stack of word lines and a second stack of word lines extending in a first direction on the substrate and separated from each other in a second direction perpendicular to the first direction. The device further includes first array lines extending in the second direction on the first and the second stack, and connected to word lines of the first and the second stack through at least two of first via contacts in a same level. The device further include first word select lines being in a same level and extending in the first direction, and connected to each of the first array lines through at least one of second via contacts. Ends of each of the first and the second stack have a form of stairs on the substrate.

公开(公告)号：US20190074292A1

公开(公告)日：2019-03-07

申请号：US16177566

申请日：2018-11-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNG-MIN HWANG ,  Han-Soo Kim ,  Won-Seok Cho ,  Jae-Hoon Jang

IPC: H01L27/11582 ,  H01L29/66 ,  H01L27/11578 ,  H01L21/768 ,  H01L21/306 ,  H01L21/285 ,  H01L21/265 ,  G11C16/04

Abstract: Provided is a vertical non-volatile memory device having a metal source line. The vertical non-volatile memory device includes cell string units that are formed on first portions of a semiconductor substrate and are vertically arranged with respect to a surface of the semiconductor substrate, impurity regions formed on second portions of the semiconductor substrate between the cell string units, conductive lines formed on the impurity regions, and spacers that are formed on the sidewalls of the cell string units and insulate the conductive lines from the cells string units.

公开(公告)号：US11177274B2

公开(公告)日：2021-11-16

申请号：US16177566

申请日：2018-11-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung-Min Hwang ,  Han-Soo Kim ,  Won-Seok Cho ,  Jae-Hoon Jang

IPC: H01L27/11582 ,  H01L27/11578 ,  H01L21/265 ,  H01L21/285 ,  H01L21/306 ,  H01L21/768 ,  H01L29/66 ,  G11C16/04

Abstract: Provided is a vertical non-volatile memory device having a metal source line. The vertical non-volatile memory device includes cell string units that are formed on first portions of a semiconductor substrate and are vertically arranged with respect to a surface of the semiconductor substrate, impurity regions formed on second portions of the semiconductor substrate between the cell string units, conductive lines formed on the impurity regions, and spacers that are formed on the sidewalls of the cell string units and insulate the conductive lines from the cells string units.