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公开(公告)号：US20230155506A1
公开(公告)日：2023-05-18
申请号：US17937492
申请日：2022-10-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Takahiro NOMIYAMA , Jong Beom BAEK
CPC classification number: H02M3/1582 , H02M3/157 , H02M1/0025 , H02M1/009 , H02M1/0095
Abstract: Embodiments of a switching regulator include a single inductor or two inductors connecting an input circuit and a multi-output end circuit that may drive different loads at different respective voltage levels. The input circuit may include a plurality of input switches, and may boost an input voltage or a ground voltage via operation in one of a plurality of selected modes such as a buck mode, a boost mode and a boost-buck mode, to thereby provide an applied voltage to the one or more inductors. Each selected mode may be based on a target voltage for one of a plurality of unit output ends (output load driving sections) in the multi-output end circuit. Output voltages may be monitored and on-times of switches controlled in the multi-output end circuit to maintain the output voltages in respective target ranges.
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Patent Agency Ranking
公开(公告)号：US20240184320A1
公开(公告)日：2024-06-06
申请号：US18490240
申请日：2023-10-19
Applicant: Samsung Electronics Co., Ltd.
Inventor： Takahiro NOMIYAMA , Yongmin KIM
IPC: G05F1/575 , G11C11/4074 , G11C11/4076
CPC classification number: G05F1/575 , G11C11/4074 , G11C11/4076
Abstract: A low dropout (LDO) regulator is configured to generate first to nth output voltages, where n is a natural number greater than or equal to 2, and each of the first to nth output voltages corresponds to a reference voltage. The LDO regulator includes an amplifier configured to generate an error voltage based on the reference voltage and a first output voltage of the first to nth output voltages, a trimming control circuit configured to generate first to (n−1)th trimming signals based on the first to nth output voltages, and an output buffer circuit configured to generate the first to nth output voltages based on the error voltage and the first to (n−1)th trimming signals.
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公开(公告)号：US20230050531A1
公开(公告)日：2023-02-16
申请号：US17702163
申请日：2022-03-23
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jeongkwang LEE , Ikhwan KIM , Takahiro NOMIYAMA , Youngho JUNG
Abstract: A voltage dividing capacitor circuit includes first capacitor through third capacitor dividers and first through fourth load capacitors. The first capacitor divider includes a first flying capacitor and a plurality of first switches connected in series between a first voltage node and a ground node, and is connected to a second voltage node. The second capacitor divider is connected to the first voltage node, the second voltage node, and a first intermediate voltage node. The third capacitor divider is connected to the second voltage node, the ground voltage node, and a second intermediate voltage node. The first through fourth load capacitors are connected in series between the first voltage node and the ground node. The second capacitor divider includes a second flying capacitor and a plurality of second switches connected in series between the first voltage node and the second voltage node.
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公开(公告)号：US20240248502A1
公开(公告)日：2024-07-25
申请号：US18402577
申请日：2024-01-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seki KIM , Susie KIM , Dongha LEE , Takahiro NOMIYAMA
Abstract: A system-on-chip includes a low-dropout (LDO) regulator configured to regulate a voltage of input power and to supply operation power to a core through an output mode, the core configured to receive the operation power to perform an operation, and a power supply circuit configured to supply the input power to the LDO regulator. The power supply circuit may receive first power and second power having different voltage characteristics, and may supply third power, which is power having a higher voltage of the first power and the second power, and the second power to the LDO regulator as the input power.
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5.发明公开公开(公告)号：US20230145751A1
公开(公告)日：2023-05-11
申请号：US18153208
申请日：2023-01-11
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jeongkwang LEE , Ikhwan KIM , Takahiro NOMIYAMA , Youngho JUNG
Abstract: A voltage dividing capacitor circuit includes a first capacitor voltage divider and a second capacitor voltage divider. The first capacitor voltage divider is connected to a second voltage node, the first capacitor voltage divider includes a first flying capacitor and a plurality of first switches, the second voltage node coupled to a second load capacitor, the plurality of first switches connected in series between a first voltage node and a ground node, the first voltage node coupled to a first load capacitor, and the ground node coupled to a ground voltage. The second capacitor voltage divider is connected between the first voltage node and the second voltage node, and includes a second flying capacitor and a plurality of second switches, the plurality of second switches connected in series between the first voltage node and the second voltage node.
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6.发明申请公开(公告)号：US20220075401A1
公开(公告)日：2022-03-10
申请号：US17334053
申请日：2021-05-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jeongkwang LEE , Ikhwan KIM , Takahiro NOMIYAMA , Youngho JUNG
IPC: G05F1/56
Abstract: A voltage dividing capacitor circuit includes a first capacitor voltage divider and a second capacitor voltage divider. The first capacitor voltage divider is connected to a second voltage node, the first capacitor voltage divider includes a first flying capacitor and a plurality of first switches, the second voltage node coupled to a second load capacitor, the plurality of first switches connected in series between a first voltage node and a ground node, the first voltage node coupled to a first load capacitor, and the ground node coupled to a ground voltage. The second capacitor voltage divider is connected between the first voltage node and the second voltage node, and includes a second flying capacitor and a plurality of second switches, the plurality of second switches connected in series between the first voltage node and the second voltage node.
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