公开(公告)号：US20250167089A1

公开(公告)日：2025-05-22

申请号：US18734563

申请日：2024-06-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungmin MOON ,  Pyoungwan KIM

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L25/065

Abstract: A semiconductor package includes a lower redistribution wiring layer having first redistribution wirings, the lower redistribution wiring layer having a first region and a second region surrounding the first region, a semiconductor chip on the first region of the lower redistribution wiring layer and electrically connected to the first redistribution wirings, at least one bridge die stack on the second region of the lower redistribution wiring layer and including a plurality of bridge dies sequentially stacked on one another, each of the bridge dies including a plurality of through-vias that are electrically connected to the first redistribution wirings, a sealing member on the lower redistribution wiring layer covering the semiconductor chip and the at least one bridge die stack and an upper redistribution wiring layer on the sealing member and including second redistribution wirings electrically connected to the through-vias of the at least one bridge die stack.

公开(公告)号：US20250079395A1

公开(公告)日：2025-03-06

申请号：US18815924

申请日：2024-08-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungmin MOON ,  Pyoungwan KIM

IPC: H01L23/00 ,  H01L21/56 ,  H01L21/66

Abstract: A method of manufacturing a semiconductor package, the method includes preparing a first semiconductor chip including a plurality of first upper connection pads, disposing a plurality of connection bumps electrically connected to the plurality of first upper connection pads on the first semiconductor chip, forming an insulating adhesive layer at least partially covering the plurality of connection bumps on an upper surface of the first semiconductor chip, removing a plurality of regions to be removed of the insulating adhesive layer, and bonding a second semiconductor chip including a plurality of second lower connection pads on the insulating adhesive layer, wherein each of the plurality of regions to be removed is a portion of the insulating adhesive layer that at least partially overlaps a connection bump among the plurality of corresponding connection bumps in a vertical direction.

公开(公告)号：US20240243054A1

公开(公告)日：2024-07-18

申请号：US18539949

申请日：2023-12-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungmin MOON ,  Pyoungwan KIM ,  Giho JEONG

IPC: H01L23/498 ,  H01L25/18 ,  H10B80/00

CPC classification number: H01L23/49838 ,  H01L25/18 ,  H10B80/00 ,  H01L23/3128 ,  H01L23/49894

Abstract: A semiconductor package may include a first wiring structure, a second wiring structure on the first wiring structure, a semiconductor chip between the first wiring structure and the second wiring structure, and an expanded structure that electrically connects the first wiring structure with the second wiring structure and surrounds the semiconductor chip. At least one of the first wiring structure and the second wiring structure may include a first insulating layer on the semiconductor chip and the expanded structure, a first wiring layer on the first insulating layer, a second insulating layer covering the first insulating layer and the first wiring layer, a crack prevention layer on the second insulating layer, and a second wiring layer on the second insulating layer and the crack prevention layer. The second wiring layer may include a pad portion.