公开(公告)号：US20240243054A1

公开(公告)日：2024-07-18

申请号：US18539949

申请日：2023-12-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungmin MOON ,  Pyoungwan KIM ,  Giho JEONG

IPC: H01L23/498 ,  H01L25/18 ,  H10B80/00

CPC classification number: H01L23/49838 ,  H01L25/18 ,  H10B80/00 ,  H01L23/3128 ,  H01L23/49894

Abstract: A semiconductor package may include a first wiring structure, a second wiring structure on the first wiring structure, a semiconductor chip between the first wiring structure and the second wiring structure, and an expanded structure that electrically connects the first wiring structure with the second wiring structure and surrounds the semiconductor chip. At least one of the first wiring structure and the second wiring structure may include a first insulating layer on the semiconductor chip and the expanded structure, a first wiring layer on the first insulating layer, a second insulating layer covering the first insulating layer and the first wiring layer, a crack prevention layer on the second insulating layer, and a second wiring layer on the second insulating layer and the crack prevention layer. The second wiring layer may include a pad portion.