公开(公告)号：US20230102650A1

公开(公告)日：2023-03-30

申请号：US17954960

申请日：2022-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Geuno JEONG ,  Janghee LEE ,  Sungjoo AN ,  Seran OH

IPC: H01L21/02 ,  H01L21/687 ,  C23C16/458 ,  C23C16/02 ,  C23C16/455 ,  C23C16/46 ,  C23C16/26

Abstract: A substrate processing apparatus includes: configured to support a plurality of substrates; a chamber sidewall surrounding at least a side surface of the substrate support; and an upper plate including a plurality of plate portions on the substrate support and spaced apart from the substrate support. The plurality of plate portions and the substrate support collectively at least partially define a plurality of process regions between the plurality of plate portions and the substrate support and a separation between at least two process regions of the plurality of process regions. The plurality of process regions include a pretreatment process region between the pretreatment process plate portion and the substrate support and having a first height, and a deposition process region between the deposition process plate portion and the substrate support and having a second height, greater than the first height.

公开(公告)号：US20230170216A1

公开(公告)日：2023-06-01

申请号：US17870309

申请日：2022-07-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungjoo AN ,  Seran OH ,  Yeonuk KIM

IPC: H01L21/033 ,  H01L21/02

CPC classification number: H01L21/0332 ,  H01L21/022 ,  H01L21/02115

Abstract: A hard mask film for use in a process for manufacture of a semiconductor device, comprises a first graphene layer; a first amorphous carbon layer formed on the first graphene layer; a second graphene layer formed on the first amorphous carbon layer; and a second amorphous carbon layer formed on the second graphene layer.

公开(公告)号：US20230163023A1

公开(公告)日：2023-05-25

申请号：US18054970

申请日：2022-11-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungjoo AN ,  Jungsoo YOON ,  Soyoung LEE ,  Keunwook SHIN

IPC: H01L21/764 ,  H01L21/768 ,  H01L27/11556 ,  H01L27/11582

CPC classification number: H01L21/764 ,  H01L21/7682 ,  H01L27/11556 ,  H01L27/11582

Abstract: A method of fabricating a semiconductor device including a two-dimensional material layer defining an air-gap, and the semiconductor device therefrom are provided. The method of fabricating a semiconductor device, includes forming a structure on a substrate, wherein the structure has an opening; loading the substrate into a process chamber; forming at least one two-dimensional material layer on an upper surface of the structure so as to overlie the opening and form an air-gap, wherein an upper portion of the air-gap is defined by the at least one two-dimensional material layer; and unloading the substrate from the process chamber.