-
公开(公告)号:US20150145122A1
公开(公告)日:2015-05-28
申请号:US14267872
申请日:2014-05-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Young KOOG , Jiankang WANG , Harpreet GILL , Sunghwan MIN
IPC: H01L23/00
CPC classification number: H01L24/06 , H01L23/495 , H01L23/522 , H01L2224/06133 , H01L2224/06135
Abstract: An embodiment includes an integrated circuit, comprising: a substrate; a first circuit formed on the substrate and coupled to a plurality of first pads on the substrate; and a second circuit formed on the substrate and coupled to a plurality of second pads on the substrate. The first pads are formed on a perimeter of the substrate; and the second pads extend from the perimeter of the substrate towards an interior of the substrate.
Abstract translation: 一个实施例包括集成电路,包括:衬底; 形成在所述衬底上并耦合到所述衬底上的多个第一焊盘的第一电路; 以及形成在所述衬底上并耦合到所述衬底上的多个第二焊盘的第二电路。 第一焊盘形成在衬底的周边上; 并且第二焊盘从衬底的周边延伸到衬底的内部。
-
公开(公告)号:US20160276308A1
公开(公告)日:2016-09-22
申请号:US14806604
申请日:2015-07-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sunghwan MIN , YoonHa JUNG , Jungyong CHOI , Sung Hoon KIM
IPC: H01L25/065 , H01L23/498 , H01L23/31 , H01L23/367
CPC classification number: H01L23/3128 , H01L23/36 , H01L23/367 , H01L23/3737 , H01L23/5389 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/92 , H01L25/0655 , H01L25/105 , H01L25/50 , H01L2224/04105 , H01L2224/12105 , H01L2224/16227 , H01L2224/32225 , H01L2224/48227 , H01L2224/73253 , H01L2224/73267 , H01L2224/92225 , H01L2225/1023 , H01L2225/1035 , H01L2225/1058 , H01L2225/1094 , H01L2924/00014 , H01L2924/1436 , H01L2924/15311 , H01L2924/1533 , H01L2924/19107 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: A semiconductor package comprises a bottom package and a top package. The bottom package comprises at least one bottom-package semiconductor device. The top package is on the bottom package and comprises a first side, a second side, a package substrate, a plurality of top-package semiconductor devices, and at least one thermal path. The package substrate is disposed at the first side of the top package. The plurality of top-package semiconductor devices is disposed on the package substrate. The at least one thermal path is disposed between a first top-package semiconductor device and a second top-package semiconductor device, and the thermal path extends from the first side of the top package through the package substrate to the second side of the top package.
Abstract translation: 半导体封装包括底部封装和顶部封装。 底部封装包括至少一个底部封装半导体器件。 顶部封装在底部封装上并且包括第一侧面,第二侧面,封装基板,多个顶部封装半导体器件以及至少一个热路径。 封装衬底设置在顶部封装的第一侧。 多个顶部封装半导体器件设置在封装衬底上。 至少一个热路径设置在第一顶部封装半导体器件和第二顶部封装半导体器件之间,并且热路径从顶部封装的第一侧通过封装衬底延伸到顶部封装的第二侧 。
-