公开(公告)号：US20200243532A1

公开(公告)日：2020-07-30

申请号：US16851957

申请日：2020-04-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hui-Jung KIM ,  Sung-hee HAN ,  Ki-seok LEE ,  Bong-Soo KIM ,  Yoo-sang HWANG

IPC: H01L27/108 ,  H01L49/02

Abstract: An integrated circuit device may include a support pattern over a substrate, a lower electrode pattern and a dielectric structure over the substrate, and an upper electrode structure on the dielectric structure. The support pattern may include a first support structure extending in a vertical direction. The lower electrode pattern may be between the support pattern and the dielectric structure. The lower electrode pattern may include a first group of N (e.g., an integer of 4 or more) lower electrodes that are spaced apart from each other and may extend in the vertical direction to a first level above the substrate. The dielectric structure may include a first dielectric protrusion that extends in the vertical direction and surrounds the first support structure and the first group of N lower electrodes. The upper electrode structure may include a first upper electrode protrusion that surrounds the first dielectric protrusion.

公开(公告)号：US20200035541A1

公开(公告)日：2020-01-30

申请号：US16258815

申请日：2019-01-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-hwan Chun ,  Hui-jung KIM ,  Keun-nam KIM ,  Sung-hee HAN ,  Yoo-sang HWANG

IPC: H01L21/768 ,  H01L21/762 ,  H01L21/764 ,  H01L29/06 ,  H01L27/108

Abstract: A semiconductor device includes: a substrate having active regions defined by a device isolation region; a conductive line extending in a direction on the active regions; insulating liners on both sidewalls of a lower portion of the conductive line that contacts with the active regions; spacers that are apart from the insulating liners in a direction perpendicular to a surface of the substrate and sequentially formed on both sidewalls of an upper portion of the conductive line; a blocking layer arranged at a spacing between a spacer located in the middle of the spacers and the insulating liners and in a recess portion recessed from one end of the spacer located in the middle of the spacers toward the conductive line; and conductive patterns arranged on the active regions on both sides of the spacers.