公开(公告)号：US20170092349A1

公开(公告)日：2017-03-30

申请号：US15372750

申请日：2016-12-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun-Young Lee ,  Kyo-Min SOHN ,  Sang-Joon HWANG ,  Sung-Min SEO ,  Sang-Bo LEE ,  Nak-Won HEO

IPC: G11C11/406 ,  G11C11/408 ,  G11C29/44 ,  G11C17/16

CPC classification number: G11C11/40615 ,  G11C11/406 ,  G11C11/408 ,  G11C17/16 ,  G11C29/44 ,  G11C29/783 ,  G11C29/785 ,  G11C2029/4402

Abstract: A semiconductor memory device includes a memory cell array, a repair control circuit and a refresh control circuit. The memory cell array includes a plurality of memory cells and a plurality of redundancy memory cells. The repair control circuit receives a repair command and performs a repair operation on a first defective memory cell among the plurality of memory cells during a repair mode. The semiconductor memory device may operate in a repair mode in response to the repair command. The refresh control circuit performs a refresh operation on non-defective ones of the plurality of memory cells during the repair mode.

公开(公告)号：US20140219038A1

公开(公告)日：2014-08-07

申请号：US14073987

申请日：2013-11-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Je-Min RYU ,  Sung-Min SEO ,  Ju-Seop PARK

IPC: G11C7/22

CPC classification number: G11C7/20 ,  G11C7/1063 ,  G11C7/22 ,  G11C7/222 ,  G11C29/028 ,  G11C2029/4402

Abstract: A data read start decision device includes: a storing circuit configured to store code key data; a read check circuit configured to output a read start signal in response to code key data read from the storing circuit, and a controller configured to start reading environment setting data from the storing circuit in response to the read start signal. The read check circuit is configured to at least one of: receive the read start signal from the controller and transfer the read start signal to the controller in response to the read code key data; and generate the read start signal based on the read code key data and output the read start signal to the controller.

Abstract translation: 数据读取开始判定装置包括：存储电路，被配置为存储代码密钥数据; 读取检查电路，被配置为响应于从存储电路读取的代码密钥数据输出读取开始信号，以及控制器，被配置为响应于读取的开始信号从存储电路开始读取环境设置数据。 读取检查电路被配置为以下中的至少一个：从控制器接收读取开始信号并响应于读取代码密钥数据将读取的开始信号传送到控制器; 并根据读取的代码键数据生成读取开始信号，并将读出的开始信号输出到控制器。

公开(公告)号：US20140104921A1

公开(公告)日：2014-04-17

申请号：US14049399

申请日：2013-10-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Je-Min YU ,  Sung-Min SEO ,  Ho-Young SONG ,  Gil-Su KIM ,  Jong-Min OH

IPC: G11C17/08

CPC classification number: G11C17/08 ,  G11C16/04 ,  G11C16/0483 ,  G11C17/16 ,  G11C17/18 ,  G11C29/785

Abstract: Provided is a semiconductor memory device. The semiconductor includes a One Time Programmable (OTP) cell array, a converging circuit and a sense amplifier circuit. The OTP cell array includes a plurality of OTP cells connected to a plurality of bit lines, each bit line extending in a first direction. The converging includes a common node contacting a first bit line and a second bit line. The sense amplifier circuit includes a sense amplifier connected to the common node, the sense amplifier configured to amplify a signal of the common node.

Abstract translation: 提供了一种半导体存储器件。 该半导体包括一个可编程（OTP）单元阵列，一个会聚电路和一个读出放大器电路。 OTP单元阵列包括连接到多个位线的多个OTP单元，每个位线沿第一方向延伸。 收敛包括接触第一位线和第二位线的公共节点。 感测放大器电路包括连接到公共节点的读出放大器，该读出放大器配置成放大公共节点的信号。

公开(公告)号：US20160247553A1

公开(公告)日：2016-08-25

申请号：US15142491

申请日：2016-04-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun-Young LEE ,  Kyo-Min SOHN ,  Sang-Joon HWANG ,  Sung-Min SEO ,  Sang-Bo LEE ,  Nak-Won HEO

IPC: G11C11/406 ,  G11C29/44 ,  G11C11/408 ,  G11C17/16

CPC classification number: G11C11/40615 ,  G11C11/406 ,  G11C11/408 ,  G11C17/16 ,  G11C29/44 ,  G11C29/783 ,  G11C29/785 ,  G11C2029/4402

Abstract: A semiconductor memory device includes a memory cell array, a repair control circuit and a refresh control circuit. The memory cell array includes a plurality of memory cells and a plurality of redundancy memory cells. The repair control circuit receives a repair command and performs a repair operation on a first defective memory cell among the plurality of memory cells during a repair mode. The semiconductor memory device may operate in a repair mode in response to the repair command. The refresh control circuit performs a refresh operation on non-defective ones of the plurality of memory cells during the repair mode.

公开(公告)号：US20140241085A1

公开(公告)日：2014-08-28

申请号：US14076401

申请日：2013-11-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Je-Min RYU ,  Sung-Min SEO ,  Yong-Ho CHO ,  Nak-Won HEO

IPC: G11C29/04

CPC classification number: G11C29/04 ,  G11C17/16 ,  G11C2029/4402

Abstract: A semiconductor memory device for performing a disable operation using an anti-fuse, and method thereof are provided. The semiconductor memory device according to an example embodiment includes a fuse circuit including at least one anti-fuse configured to store fuse data, a memory circuit configured to at least one of read data stored in a memory cell and write data to the memory cell and a fuse controller configured to disable a read/write operation of the memory circuit based on the fuse data.

Abstract translation: 提供了一种使用反熔丝执行禁止操作的半导体存储器件及其方法。 根据示例实施例的半导体存储器件包括：熔丝电路，其包括被配置为存储熔丝数据的至少一个反熔丝;存储器电路，被配置为存储在存储单元中的读取数据中的至少一个，并将数据写入存储器单元; 熔丝控制器，被配置为基于所述熔丝数据来禁止所述存储器电路的读/写操作。

公开(公告)号：US20130242635A1

公开(公告)日：2013-09-19

申请号：US13795567

申请日：2013-03-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Je-Min YU ,  Ho-Young SONG ,  Sung-Min SEO ,  Sang-Joon HWANG

IPC: G11C17/00

CPC classification number: G11C17/00 ,  G11C17/16 ,  G11C17/18

Abstract: A semiconductor memory device includes a memory cell array configured to store data including a verification code; a sensing unit configured to sense the stored data including the verification code; and a verification unit configured to determine whether the sensing unit is able to sense the stored data based on a sensing condition, wherein the verification unit is configured to determine whether the sensing unit is able to sense the stored data based on the sensing condition and a value of the verification code sensed by the sensing unit.

Abstract translation: 半导体存储器件包括：存储单元阵列，被配置为存储包括验证码的数据; 感测单元，被配置为感测存储的包括验证码的数据; 以及验证单元，被配置为基于感测条件来确定所述感测单元是否能够感测所存储的数据，其中所述验证单元被配置为基于所述感测条件来确定所述感测单元是否能够感测所存储的数据，以及 由感测单元感测的验证码的值。