Abstract:
A memory system includes a memory controller, a memory cell array, a location information storage unit, an address mapping table, an address conversion unit, and a mapping information calculation unit. The memory controller generates a logical address signal and an address re-mapping command. The memory cell array includes a plurality of logic blocks. The location information storage unit stores location information corresponding to faulty memory cells included in the memory cell array. The address mapping table stores address mapping information. The address conversion unit converts the logical address signal to a physical address signal corresponding to the memory cell array based on the address mapping information. The mapping information calculation unit generates the address mapping information to reduce the number of logic blocks including the faulty memory cells based on the location information upon the mapping information calculation unit receiving the address re-mapping command.
Abstract:
Provided are a cover having a metallic grid structure and a method for manufacturing the cover. The cover includes a pattern portion formed of a metallic material, in which a plurality of patterns are independently disposed spaced apart from each other and an injection portion disposed between pattern portions to connect the pattern portions, the injection portion being formed of a non-metallic material. The method includes forming a pre-pattern portion including patterns in a regular or irregular form and a bridge connecting the patterns on a metallic plate, forming the injection portion on the pre-pattern portion by insert-injection or thermo-compression press, and removing the bridge.
Abstract:
An electronic device case and a surface treatment method thereof are provided in which an exterior case is diecast of an aluminum alloy, an aluminum alloy layer is deposited on an outer surface of the exterior case, an oxidized coating layer is formed on a surface of the aluminum alloy layer, and a sealing layer is formed atop the oxidized coating layer and may seal pores therein. A pigment colored layer may be formed between the oxidized coating layer and the sealing layer.
Abstract:
A memory system includes a memory controller, a memory cell array, a location information storage unit, an address mapping table, an address conversion unit, and a mapping information calculation unit. The memory controller generates a logical address signal and an address re-mapping command. The memory cell array includes a plurality of logic blocks. The location information storage unit stores location information corresponding to faulty memory cells included in the memory cell array. The address mapping table stores address mapping information. The address conversion unit converts the logical address signal to a physical address signal corresponding to the memory cell array based on the address mapping information. The mapping information calculation unit generates the address mapping information to reduce the number of logic blocks including the faulty memory cells based on the location information upon the mapping information calculation unit receiving the address re-mapping command.
Abstract:
Provided are a cover having a metallic grid structure and a method for manufacturing the cover. The cover includes a pattern portion formed of a metallic material, in which a plurality of patterns are independently disposed spaced apart from each other and an injection portion disposed between pattern portions to connect the pattern portions, the injection portion being formed of a non-metallic material. The method includes forming a pre-pattern portion including patterns in a regular or irregular form and a bridge connecting the patterns on a metallic plate, forming the injection portion on the pre-pattern portion by insert-injection or thermo-compression press, and removing the bridge.