公开(公告)号：US20230268266A1

公开(公告)日：2023-08-24

申请号：US18186618

申请日：2023-03-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun Ho Kim ,  Ji Hoon Kim ,  Ha Young Ahn ,  Shang Hoon Seo ,  Seung Yeop Kook ,  Sung Won Jeong

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/538 ,  H01L23/31

CPC classification number: H01L23/49838 ,  H01L23/3128 ,  H01L23/5389 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/19 ,  H01L24/20 ,  H01L23/13 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2924/3512 ,  H01L2924/18162

Abstract: A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer, and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. At least a portion of a first wall of a first trench of the first insulating layer and at least a portion of a second wall of a second trench of the second insulating layer overlap each other vertically. At least a portion of the second wall of the second trench and at least a portion of a third wall of a third trench of the third insulating layer overlap each other vertically

公开(公告)号：US10861784B2

公开(公告)日：2020-12-08

申请号：US16884316

申请日：2020-05-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun Ho Kim ,  Ji Hoon Kim ,  Ha Young Ahn ,  Shang Hoon Seo ,  Seung Yeop Kook ,  Sung Won Jeong

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/538 ,  H01L23/31 ,  H01L23/13

Abstract: A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. A center line of the first via is out of alignment with at least one of a center line of the first pad and a center line of the second pad.

公开(公告)号：US10446481B2

公开(公告)日：2019-10-15

申请号：US16038956

申请日：2018-07-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun Ho Kim ,  Ji Hoon Kim ,  Ha Young Ahn ,  Shang Hoon Seo ,  Seung Yeop Kook ,  Sung Won Jeong

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L23/538 ,  H01L23/13

Abstract: A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. A center line of the first via is out of alignment with at least one of a center line of the first pad and a center line of the second pad.

公开(公告)号：US20210118791A1

公开(公告)日：2021-04-22

申请号：US17113284

申请日：2020-12-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun Ho Kim ,  Ji Hoon Kim ,  Ha Young Ahn ,  Shang Hoon Seo ,  Seung Yeop Kook ,  Sung Won Jeong

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/538 ,  H01L23/31

Abstract: A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. A center line of the first via is out of alignment with at least one of a center line of the first pad and a center line of the second pad.

公开(公告)号：US10658260B2

公开(公告)日：2020-05-19

申请号：US16521255

申请日：2019-07-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Soo Ha ,  Hyeon Seok Lee ,  Sun Ho Kim

IPC: H01L23/31 ,  H01L21/48 ,  H01L23/00 ,  H01L23/498 ,  H01L21/56 ,  H05K3/34 ,  H05K1/18

Abstract: A fan-out semiconductor package includes a core member having a through-hole. A semiconductor chip is in the through-hole and has an active surface with connection pads and an inactive surface opposing the active surface. An encapsulant encapsulates at least portions of the core member and the semiconductor chip and fills at least a portion of the through-hole. A connection member is on the core member and the active surface of the semiconductor chip and includes a redistribution layer electrically connected to the connection pads. The core member includes a groove portion penetrating from a wall of the through-hole up to an outer side surface of the core member in a lower portion of the core member on which the connection member is disposed.

公开(公告)号：US09496328B2

公开(公告)日：2016-11-15

申请号：US14682518

申请日：2015-04-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Bom Seo ,  Young Geun Park ,  Bong Hyun Kim ,  Sun Ho Kim ,  Hyun Jun Kim ,  Se Hyoung Ahn ,  Chang Mu An

IPC: H01L27/108 ,  H01L49/02 ,  B05D1/00

CPC classification number: H01L28/90 ,  B05D1/60 ,  H01L27/10814 ,  H01L27/10852

Abstract: A method of manufacturing a capacitor for a semiconductor device includes forming a lower electrode, forming a dielectric layer on the lower electrode, forming a first upper electrode on the dielectric layer, adsorbing an organic silicon source onto a surface of the first upper electrode, and forming a second upper electrode on the first upper electrode onto which the organic silicon source is adsorbed. Related devices and fabrication methods are also discussed.

Abstract translation: 制造半导体装置的电容器的方法包括：形成下电极，在所述下电极上形成电介质层，在所述电介质层上形成第一上电极，将有机硅源吸附在所述第一上电极的表面上，以及 在其上吸附有机硅源的第一上电极上形成第二上电极。 还讨论了相关设备和制造方法。

公开(公告)号：US12300594B2

公开(公告)日：2025-05-13

申请号：US18186618

申请日：2023-03-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun Ho Kim ,  Ji Hoon Kim ,  Ha Young Ahn ,  Shang Hoon Seo ,  Seung Yeop Kook ,  Sung Won Jeong

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L23/13

Abstract: A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer, and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. At least a portion of a first wall of a first trench of the first insulating layer and at least a portion of a second wall of a second trench of the second insulating layer overlap each other vertically. At least a portion of the second wall of the second trench and at least a portion of a third wall of a third trench of the third insulating layer overlap each other vertically.

公开(公告)号：US10373887B2

公开(公告)日：2019-08-06

申请号：US15895604

申请日：2018-02-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Soo Ha ,  Hyeon Seok Lee ,  Sun Ho Kim

IPC: H01L23/31 ,  H01L21/48 ,  H01L23/00 ,  H01L23/498 ,  H01L21/56

Abstract: A fan-out semiconductor package includes a core member having a through-hole. A semiconductor chip is in the through-hole and has an active surface with connection pads and an inactive surface opposing the active surface. An encapsulant encapsulates at least portions of the core member and the semiconductor chip and fills at least a portion of the through-hole. A connection member is on the core member and the active surface of the semiconductor chip and includes a redistribution layer electrically connected to the connection pads. The core member includes a groove portion penetrating from a wall of the through-hole up to an outer side surface of the core member in a lower portion of the core member on which the connection member is disposed.

公开(公告)号：US20160043163A1

公开(公告)日：2016-02-11

申请号：US14682518

申请日：2015-04-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Bom Seo ,  Young Geun Park ,  Bong Hyun Kim ,  Sun Ho Kim ,  Hyun Jun Kim ,  Se Hyoung Ahn ,  Chang Mu An

IPC: H01L49/02

CPC classification number: H01L28/90 ,  B05D1/60 ,  H01L27/10814 ,  H01L27/10852

Abstract: A method of manufacturing a capacitor for a semiconductor device includes forming a lower electrode, forming a dielectric layer on the lower electrode, forming a first upper electrode on the dielectric layer, adsorbing an organic silicon source onto a surface of the first upper electrode, and forming a second upper electrode on the first upper electrode onto which the organic silicon source is adsorbed. Related devices and fabrication methods are also discussed.

Abstract translation: 制造半导体装置的电容器的方法包括：形成下电极，在所述下电极上形成电介质层，在所述电介质层上形成第一上电极，将有机硅源吸附在所述第一上电极的表面上，以及 在其上吸附有机硅源的第一上电极上形成第二上电极。 还讨论了相关设备和制造方法。

公开(公告)号：US20240353764A1

公开(公告)日：2024-10-24

申请号：US18388298

申请日：2023-11-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyung Chin YI ,  Dong Sik Jeong ,  Sun Ho Kim ,  Woo-Hyung Kim ,  Seung Uk Park ,  Yong Hee Lee

IPC: G03F7/00

CPC classification number: G03F7/70916 ,  G03F7/70725 ,  G03F7/70808 ,  G03F7/7095 ,  G03F7/70991

Abstract: Provided is a lithography apparatus including a wafer stage, a cable connected to the wafer stage, the cable being configured to bend based on the wafer stage moving, a support unit configured to prevent the cable from sagging, the support unit including a plurality of clamps configured to restrict movement of the cable and a connection member connecting the plurality of clamps to each other, and a protective unit under the cable, the protective unit being configured to collide with the support unit based on the wafer stage moving, wherein the protective unit includes ultra-high molecular weight polyethylene (UHMWPE).