公开(公告)号：US10361198B2

公开(公告)日：2019-07-23

申请号：US15603577

申请日：2017-05-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sidharth Rastogi ,  Subhash Kuchanuri ,  Raheel Azmat ,  Pan-jae Park ,  Chul-hong Park ,  Jae-seok Yang ,  Kwan-young Chun

IPC: H01L27/092 ,  H01L23/535 ,  H01L29/06 ,  H01L29/49 ,  H01L27/02 ,  H01L29/78 ,  H01L29/417 ,  H01L21/8238 ,  H01L27/118

Abstract: An integrated circuit device includes a substrate including a fin active region extending in a first direction, a gate line intersecting the fin active region and extending in a second direction perpendicular to the first direction, a power line electrically connected to source/drain regions at sides of the gate line on the fin active region, a pair of dummy gate lines intersecting the fin active region and extending in the second direction, and a device separation structure electrically connected to the pair of dummy gate lines and including a lower dummy contact plug between the pair of dummy gate lines on the fin active region and electrically connected to the power line, and an upper dummy contact plug on the lower dummy contact plug and on the pair of dummy gate lines to electrically connect the lower dummy contact plug to the pair of dummy gate lines.

公开(公告)号：US10546855B2

公开(公告)日：2020-01-28

申请号：US15473913

申请日：2017-03-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Rajeev Ranjan ,  Deepak Sharma ,  Subhash Kuchanuri ,  Chul Hong Park ,  Jae Seok Yang ,  Kwan Young Chun

IPC: H01L27/088 ,  H01L23/528 ,  H01L27/02 ,  H01L29/06 ,  H01L27/092 ,  H01L23/522

Abstract: Integrated circuit devices are provided. The IC devices may include an active region extending in a first direction, first and second gate electrodes extending in a second direction, a first impurity region in the active region adjacent a first side of the first gate electrode, a second impurity region in the active region between a second side of the first gate electrode and a first side of the second gate electrode, a third impurity region in the active region adjacent a second side of the second gate electrode, a cross gate contact electrically connecting the first and second impurity regions, a first contact electrically connected to the third impurity region, a first wire electrically connected to the cross gate contact, and a second wire electrically connected to the first contact. The first and second wires may extend only in the first direction and may be on the same line.

公开(公告)号：US10474783B2

公开(公告)日：2019-11-12

申请号：US15701971

申请日：2017-09-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sidharth Rastogi ,  Subhash Kuchanuri ,  Chul-Hong Park ,  Jae-Seok Yang

IPC: G06F17/50 ,  H01L21/768 ,  H01L23/522 ,  H01L27/02 ,  H01L27/118

Abstract: A method of designing a layout of a semiconductor device includes designing layouts of cells, each layout including first conductive lines, the first conductive lines extending in a first direction and being spaced apart from each other in a second direction crossing the first direction, disposing the layouts of the cells to be adjacent to each other in the first direction, such that the first conductive lines in adjacent layouts of the cells are connected to each other, and disposing insulation blocks at a boundary area between adjacent ones of the layouts of the cells or in areas of the layouts of the cells adjacent to the boundary area, such that the insulation blocks block connections between some of the first conductive lines.

公开(公告)号：US10903213B2

公开(公告)日：2021-01-26

申请号：US16453645

申请日：2019-06-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sidharth Rastogi ,  Subhash Kuchanuri ,  Raheel Azmat ,  Pan-jae Park ,  Chul-hong Park ,  Jae-seok Yang ,  Kwan-young Chun

IPC: H01L27/092 ,  H01L27/02 ,  H01L21/76 ,  H01L21/768 ,  H01L23/535 ,  H01L29/06 ,  H01L29/49 ,  H01L29/78 ,  H01L29/417 ,  H01L21/8238 ,  H01L27/118

Abstract: An integrated circuit device includes a substrate including a fin active region extending in a first direction, a gate line intersecting the fin active region and extending in a second direction perpendicular to the first direction, a power line electrically connected to source/drain regions at sides of the gate line on the fin active region, a pair of dummy gate lines intersecting the fin active region and extending in the second direction, and a device separation structure electrically connected to the pair of dummy gate lines and including a lower dummy contact plug between the pair of dummy gate lines on the fin active region and electrically connected to the power line, and an upper dummy contact plug on the lower dummy contact plug and on the pair of dummy gate lines to electrically connect the lower dummy contact plug to the pair of dummy gate lines.

公开(公告)号：US10699998B2

公开(公告)日：2020-06-30

申请号：US15936882

申请日：2018-03-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sidharth Rastogi ,  Subhash Kuchanuri ,  Jae Seok Yang ,  Kwan Young Chun

IPC: H01L23/522 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L21/84 ,  H01L27/12

Abstract: A semiconductor device includes an insulator on a substrate and having opposite first and second sides that each extend along a first direction, a first fin pattern extending from a third side of the insulator along the first direction, a second fin pattern extending from a fourth side of the insulator along the first direction, and a first gate structure extending from the first side of the insulator along a second direction transverse to the first direction. The device further includes a second gate structure extending from the second side of the insulator along the second direction, a third fin pattern overlapped by the first gate structure, spaced apart from the first side of the insulator, and extending along the first direction, and a fourth fin pattern which overlaps the second gate structure, is spaced apart from the second side, and extends in the direction in which the second side extends. An upper surface of the insulator is higher than an upper surface of the first fin pattern and an upper surface of the second fin pattern.

公开(公告)号：US10147684B1

公开(公告)日：2018-12-04

申请号：US15815083

申请日：2017-11-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Subhash Kuchanuri ,  Sidharth Rastogi ,  Ranjan Rajeev ,  Chul-hong Park ,  Jae-seok Yang

IPC: H01L23/48 ,  H01L23/544 ,  H01L23/485 ,  H03K19/173 ,  G06F17/50

Abstract: An integrated circuit device includes: a pair of reference conductive lines arranged in parallel in a first direction in a first version logic cell and a pair of swap conductive lines arranged in parallel in a second version logic cell, wherein one reference conductive line and one swap conductive line in different wiring tracks of the pair of reference conductive lines and the pair of swap conductive lines have the same planar shape and the same length, and extend to intersect a cell boundary between the first version logic cell and the second version logic cell.