公开(公告)号：US20180276160A1

公开(公告)日：2018-09-27

申请号：US15989539

申请日：2018-05-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUN HEE YOO ,  Jae Geun Yun ,  Bub Chul Jeong ,  Dong Soo Kang ,  Kyeo Rae Lee ,  Seong Min Jo

IPC: G06F13/368 ,  G06F13/40 ,  G06F13/16

CPC classification number: G06F13/368 ,  G06F13/1621 ,  G06F13/4068 ,  Y02D10/14 ,  Y02D10/151

Abstract: A system on chip (SoC) is present that includes a plurality of master interfaces, a plurality of slave interfaces, and an interface circuit which is connected between the plurality of master interfaces and the plurality of slave interfaces and includes a plurality of components. When a first master interface among the plurality of master interfaces and a first slave interface among the plurality of slave interfaces are paired, a first group of the components which forms a first signal path between the first master interface and the first slave interface among the plurality of components is enabled according to a control of the first master interface.

公开(公告)号：US10229079B2

公开(公告)日：2019-03-12

申请号：US15989539

申请日：2018-05-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jun Hee Yoo ,  Jae Geun Yun ,  Bub Chul Jeong ,  Dong Soo Kang ,  Kyeo Rae Lee ,  Seong Min Jo

IPC: G06F13/368 ,  G06F13/40 ,  G06F13/00 ,  G06F13/16

Abstract: A system on chip (SoC) is present that includes a plurality of master interfaces, a plurality of slave interfaces, and an interface circuit which is connected between the plurality of master interfaces and the plurality of slave interfaces and includes a plurality of components. When a first master interface among the plurality of master interfaces and a first slave interface among the plurality of slave interfaces are paired, a first group of the components which forms a first signal path between the first master interface and the first slave interface among the plurality of components is enabled according to a control of the first master interface.

公开(公告)号：US11349738B2

公开(公告)日：2022-05-31

申请号：US16886315

申请日：2020-05-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae Geun Yun ,  Seong Min Jo ,  Yun Kyo Cho ,  Byeong Jin Kim ,  Dong Soo Kang ,  Nak Hee Seong

IPC: G06F11/30 ,  H04L43/0852 ,  H04L43/0876 ,  H04L41/06

Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter; determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.

公开(公告)号：US10579564B2

公开(公告)日：2020-03-03

申请号：US16273621

申请日：2019-02-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jun Hee Yoo ,  Jae Geun Yun ,  Bub Chul Jeong ,  Dong Soo Kang ,  Kyeo Rae Lee ,  Seong Min Jo

IPC: G06F13/00 ,  G06F13/368 ,  G06F13/40 ,  G06F13/16

Abstract: A system on chip (SoC) is present that includes a plurality of master interfaces, a plurality of slave interfaces, and an interface circuit which is connected between the plurality of master interfaces and the plurality of slave interfaces and includes a plurality of components. When a first master interface among the plurality of master interfaces and a first slave interface among the plurality of slave interfaces are paired, a first group of the components which forms a first signal path between the first master interface and the first slave interface among the plurality of components is enabled according to a control of the first master interface.

公开(公告)号：US11652718B2

公开(公告)日：2023-05-16

申请号：US17743579

申请日：2022-05-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae Geun Yun ,  Seong Min Jo ,  Yun Kyo Cho ,  Byeong Jin Kim ,  Dong Soo Kang ,  Nak Hee Seong

IPC: G06F30/35 ,  H04L43/0852 ,  H04L43/0876 ,  H04L41/06

CPC classification number: H04L43/0858 ,  H04L41/06 ,  H04L43/0876

Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter; determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.

公开(公告)号：US09864687B2

公开(公告)日：2018-01-09

申请号：US15198583

申请日：2016-06-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sik Kim ,  Woo Hyung Chun ,  Seong Min Jo ,  Jae Young Hur

IPC: G06F12/00 ,  G06F12/0831 ,  G06F12/14 ,  G06F13/00 ,  G06F13/28

CPC classification number: G06F12/0831 ,  G06F12/1433 ,  G06F2212/1016 ,  G06F2212/1052 ,  G06F2212/621

Abstract: An application processor is provided. The application processor includes a cache coherent interconnect, a first master device connected to the cache coherent interconnect, a second master device, and a master-side filter connected between the cache coherent interconnect and the second master device. The master-side filter receives a snoop request from the first master device through the cache coherent interconnect, compares a second security attribute of the second master device with a first security attribute of the first master device which is included in the snoop request, and determines whether to transmit an address included in the snoop request to the second master device according to a comparison result.

公开(公告)号：US10680923B2

公开(公告)日：2020-06-09

申请号：US15427522

申请日：2017-02-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae Geun Yun ,  Seong Min Jo ,  Yun Kyo Cho ,  Byeong Jin Kim ,  Dong Soo Kang ,  Nak Hee Seong

IPC: G06F11/07 ,  G06F11/30 ,  H04L12/26 ,  H04L12/24

Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter, determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.

公开(公告)号：US10564855B2

公开(公告)日：2020-02-18

申请号：US16503200

申请日：2019-07-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Nak Hee Seong ,  Sang Youn Lee ,  Seong Min Jo ,  Yun Kyo Cho ,  Dong Soo Kang ,  Byeong Jin Kim ,  Jae Geun Yun

IPC: H04L12/26 ,  H04L12/24 ,  G06F3/06 ,  G06F13/42 ,  G06F13/364

Abstract: An operating method of a semiconductor device includes monitoring multiple request packets and multiple response packets that are being transmitted between a master device and a slave device. A target request packet that matches predefined identification (ID) information is detected from among the request packets. An operation of a latency counter is initiated. The operation is for measuring the latency of a communication exchange (transaction) that includes the target request packet and a target response packet that is one of the response packets that matches the predefined ID information. The target response packet is detected from among the response packets. The operation of the latency counter is terminated. A latency value of the communication exchange is acquired from the latency counter.

公开(公告)号：US10379749B2

公开(公告)日：2019-08-13

申请号：US15423628

申请日：2017-02-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Nak Hee Seong ,  Sang Youn Lee ,  Seong Min Jo ,  Yun Kyo Cho ,  Dong Soo Kang ,  Byeong Jin Kim ,  Jae Geun Yun

IPC: H04L12/26 ,  H04L12/24 ,  G06F3/06 ,  G06F13/364 ,  G06F13/42

Abstract: An operating method of a semiconductor device includes monitoring multiple request packets and multiple response packets that are being transmitted between a master device and a slave device. A target request packet that matches predefined identification (ID) information is detected from among the request packets. An operation of a latency counter is initiated. The operation is for measuring the latency of a communication exchange (transaction) that includes the target request packet and a target response packet that is one of the response packets that matches the predefined ID information. The target response packet is detected from among the response packets. The operation of the latency counter is terminated. A latency value of the communication exchange is acquired from the latency counter.

公开(公告)号：US09984019B2

公开(公告)日：2018-05-29

申请号：US14962373

申请日：2015-12-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jun Hee Yoo ,  Jae Geun Yun ,  Bub Chul Jeong ,  Dong Soo Kang ,  Kyeo Rae Lee ,  Seong Min Jo

IPC: G06F13/368 ,  G06F13/40 ,  G06F13/16

CPC classification number: G06F13/368 ,  G06F13/1621 ,  G06F13/4068 ,  Y02D10/14 ,  Y02D10/151

Abstract: A system on chip (SoC) is present that includes a plurality of master interfaces, a plurality of slave interfaces, and an interface circuit which is connected between the plurality of master interfaces and the plurality of slave interfaces and includes a plurality of components. When a first master interface among the plurality of master interfaces and a first slave interface among the plurality of slave interfaces are paired, a first group of the components which forms a first signal path between the first master interface and the first slave interface among the plurality of components is enabled according to a control of the first master interface.