公开(公告)号：US20240021520A1

公开(公告)日：2024-01-18

申请号：US18373392

申请日：2023-09-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seon Bae KIM ,  Seo Woo NAM

IPC: H01L23/532 ,  H01L23/522 ,  H01L21/3213 ,  H01L21/768 ,  H01L23/528

CPC classification number: H01L23/53295 ,  H01L23/5226 ,  H01L21/3213 ,  H01L21/76877 ,  H01L23/5283

Abstract: A semiconductor device includes a substrate, a first interlayer insulating layer disposed on the substrate, a first trench formed inside the first interlayer insulating layer, a contact plug disposed inside the first trench, a first wiring pattern disposed on the contact plug, a second wiring pattern which is disposed on the first interlayer insulating layer and spaced apart from the first wiring pattern in a horizontal direction, a second interlayer insulating layer which is disposed on the first interlayer insulating layer and surrounds each of side walls of the first wiring pattern and each of side walls of the second wiring pattern, and a first air gap formed on the contact plug inside the first trench.

公开(公告)号：US20220262739A1

公开(公告)日：2022-08-18

申请号：US17476985

申请日：2021-09-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seon Bae KIM ,  Seo Woo NAM

IPC: H01L23/532 ,  H01L23/522 ,  H01L23/528 ,  H01L21/768 ,  H01L21/3213

Abstract: A semiconductor device includes a substrate, a first interlayer insulating layer disposed on the substrate, a first trench formed inside the first interlayer insulating layer, a contact plug disposed inside the first trench, a first wiring pattern disposed on the contact plug, a second wiring pattern which is disposed on the first interlayer insulating layer and spaced apart from the first wiring pattern in a horizontal direction, a second interlayer insulating layer which is disposed on the first interlayer insulating layer and surrounds each of side walls of the first wiring pattern and each of side walls of the second wiring pattern, and a first air gap formed on the contact plug inside the first trench.

公开(公告)号：US20220037527A1

公开(公告)日：2022-02-03

申请号：US17474217

申请日：2021-09-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： YOUNG CHAI JUNG ,  Seon Bae KIM ,  Seung Hyun SONG

IPC: H01L29/78 ,  H01L29/417 ,  H01L29/66 ,  H01L27/085

Abstract: Integrated circuit devices and methods of forming the same are provided. Integrated circuit devices may include a vertical field-effect transistor (VFET) that includes a bottom source/drain region in a substrate, a channel region on the bottom source/drain region, a top source/drain region on the channel region, and a gate structure on a side of the channel region. The channel region may have a cross-shaped upper surface.