公开(公告)号：US09923047B2

公开(公告)日：2018-03-20

申请号：US14967956

申请日：2015-12-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Se Hoon Oh ,  Seongyul Park ,  Chin Moo Cho ,  Yunjung Choi ,  Gyu-Hee Park ,  Youn-Joung Cho ,  Younsoo Kim ,  Jae Hyoung Choi

IPC: H01L49/02 ,  H01L21/322

CPC classification number: H01L28/65 ,  H01L21/322 ,  H01L28/75

Abstract: The inventive concepts provide semiconductor devices and methods for manufacturing the same in which the method includes forming a capacitor including a bottom electrode, a dielectric layer and a top electrode sequentially stacked on a substrate, and also where formation of the top electrode includes forming a first metal nitride layer on the dielectric layer, and forming a second metal nitride layer on the first metal nitride layer, in which the first metal nitride layer is disposed between the dielectric layer and the second metal nitride layer, and the first metal nitride layer is formed at a temperature lower than a temperature at which the second metal nitride layer is formed.

公开(公告)号：US09673272B2

公开(公告)日：2017-06-06

申请号：US14863820

申请日：2015-09-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yunjung Choi ,  Se Hoon Oh ,  Jin-Su Lee ,  Younsoo Kim ,  HanJin Lim

IPC: H01L29/00 ,  H01L49/02

CPC classification number: H01L28/75 ,  H01L28/90

Abstract: A semiconductor device includes a lower electrode on a lower structure, a dielectric layer conformally covering a surface of the lower electrode, an upper electrode conformally covering a surface of the dielectric layer, and a barrier layer on the upper electrode. The barrier layer and the upper electrode define a space on a sidewall of the lower electrode.