公开(公告)号：US20250071992A1

公开(公告)日：2025-02-27

申请号：US18604586

申请日：2024-03-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min Yong Lee ,  Se Hoon Lee ,  Jun Hyoung Kim ,  Ji Young Kim ,  Suk Kang Sung

IPC: H10B43/27 ,  G11C16/04 ,  H01L23/528 ,  H01L25/065 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B41/41 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40 ,  H10B80/00

Abstract: A semiconductor memory device may include a cell substrate including a first surface and a second surface opposite to the first surface, and a landing pattern including a third surface and a fourth surface opposite to the third surface, with the landing pattern spaced apart from the cell substrate in a horizontal direction. The semiconductor memory device may include a plurality of gate electrodes sequentially stacked on the first surface and the third surface, a channel structure on the cell substrate, the channel structure extending vertically and intersecting the plurality of gate electrodes, an upper insulating film covering the second surface and the fourth surface, an input/output pad on the upper insulating film, the input/output pad overlapping at least a portion of the plurality of gate electrodes in the vertical direction, and a support contact extending through the upper insulating film and connecting the landing pattern and the input/output pad.