公开(公告)号：US20250117924A1

公开(公告)日：2025-04-10

申请号：US18631579

申请日：2024-04-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Chul YEO ,  Jae Won YANG

IPC: G06T7/00

Abstract: A method for generating a proximity correction model which is performed by a computing system is provided. The method comprises acquiring a plurality of shot images on a wafer after performing a first process using a first layout, generating an overlap image obtained by overlap of the plurality of shot images, and performing machine learning on the proximity correction model, using an image of the first layout and the overlap image.

公开(公告)号：US20240353748A1

公开(公告)日：2024-10-24

申请号：US18407673

申请日：2024-01-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Chul YEO

IPC: G03F1/36 ,  G03F1/70 ,  G03F1/86 ,  G03F7/00

CPC classification number: G03F1/36 ,  G03F1/70 ,  G03F1/86 ,  G03F7/70441

Abstract: A method for correcting an optical proximity correction (OPC) model is provided. The method comprises measuring a first target CD value at a first measurement point of an SEM image for a target pattern and measuring a second target CD value at a second measurement point, simulating the OPC model by using the first target CD value with respect to a first evaluation point corresponding to the first measurement point on a contour of the OPC model for the target pattern, simulating the OPC model by using the second target CD value with respect to a second evaluation point corresponding to the second measurement point on the contour, and fitting the OPC model with respect to each of the first evaluation point and the second evaluation point.

公开(公告)号：US20200342071A1

公开(公告)日：2020-10-29

申请号：US16693903

申请日：2019-11-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Chul YEO

IPC: G06F17/50 ,  H01L21/027 ,  H01L21/265 ,  H01L21/266 ,  G03F1/36

Abstract: A method for manufacturing a semiconductor device includes performing an optical proximity correction (OPC) process on a designed layout based on a final model signal obtained according to an OPC modeling process to generate a corrected layout, the OPC modeling process including, selecting a transmittance value of a sub-layout pattern of a sub-layout included in a target layout, the transmittance value being a parameter of an OPC model and representing an intensity of light that transmits through a photomask, and generating a final model signal based on the transmittance value of the sub-layout pattern, and forming a photoresist pattern on a substrate using the photomask generated based on the corrected layout.

公开(公告)号：US20230062677A1

公开(公告)日：2023-03-02

申请号：US17735593

申请日：2022-05-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Chul YEO ,  Min-Cheol KANG ,  Sooryong LEE

IPC: H01L21/66 ,  G01N21/88

Abstract: Disclosed are a method of forming an optical proximity correction (OPC) model and/or a method of fabricating a semiconductor device using the same. The method of forming the OPC model may include obtaining a scanning electron microscope (SEM) image, which is an average image of a plurality of images taken using one or more scanning electron microscopes, and a graphic data system (GDS) image, which is obtained by imaging a designed layout, aligning the SEM image and the GDS image, performing an image filtering process on the SEM image, extracting a contour from the SEM image, and verifying the contour. The verifying of the contour may be performed using a genetic algorithm. Variables in the genetic algorithm may include first parameters related to the image alignment process, second parameters related to the image filtering process, and third parameters related to a critical dimension (CD) measurement process.

公开(公告)号：US20240386635A1

公开(公告)日：2024-11-21

申请号：US18528275

申请日：2023-12-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Chul YEO ,  Yongjin CHUN ,  Min-Cheol KANG ,  Jaewon YANG

IPC: G06T11/60 ,  G06T7/13 ,  G06V10/24 ,  G06V10/50 ,  G06V10/74

Abstract: Disclosed is an operating method of an electronic device which includes a processor and supports manufacture of a semiconductor device. The operating method includes receiving, at the processor, a layout image for the manufacture of the semiconductor device and a captured image generated by capturing the semiconductor device actually manufactured, aligning, at the processor, the layout image and the captured image based on a result of emphasizing edges and corners of the layout image and the captured image, and performing, at the processor, learning based on the aligned layout image and the aligned captured image such that a first modified layout image is generated from the layout image, and the semiconductor device is manufactured based on a second modified layout image generated from the layout image.

公开(公告)号：US20230281792A1

公开(公告)日：2023-09-07

申请号：US18060260

申请日：2022-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sooryong LEE ,  Jaewon YANG ,  Kyoung Cho NA ,  Jihong KIM ,  Sang Chul YEO ,  Hyeok LEE

IPC: G06T7/00 ,  G06T11/00 ,  G06T3/40 ,  G06F30/392

CPC classification number: G06T7/001 ,  G06T11/00 ,  G06T3/40 ,  G06F30/392 ,  G06T2207/30148 ,  G06T2207/20081

Abstract: Disclosed is an operating method of an electronic device which includes a processor executing a semiconductor layout simulation module based on machine learning. The operating method includes receiving, at the semiconductor layout simulation module executed by the processor, a layout image, inferring a wafer image based on the layout image and a fabrication device information image of a semiconductor fabrication device fabricating a semiconductor integrated circuit based on a final layout image, adjusting the layout image when the wafer image is not acceptable, and confirming the layout image as the final layout image when the wafer image is acceptable.