公开(公告)号：US09147483B2

公开(公告)日：2015-09-29

申请号：US14068122

申请日：2013-10-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-Jun Yoon ,  Jae-Yong Jeong ,  Myoung-Hoon Choi ,  Bo-Geun Kim ,  Ki-Tae Park

IPC: G11C16/26 ,  G06F11/10 ,  G11C11/56 ,  G11C16/34 ,  G11C29/04

CPC classification number: G11C16/26 ,  G06F11/1048 ,  G11C11/5642 ,  G11C16/3422 ,  G11C2029/0411 ,  G11C2211/5641

Abstract: A memory device useable with a memory system includes a voltage generator to a plurality of first candidate voltages and a plurality of second candidate voltages, and an X decoder to sequentially apply each of the plurality of first candidate voltages and each of the plurality of second candidate voltages to one or more cells of a memory cell array, and then to apply one of the plurality of first candidate voltages and one of the plurality of second candidate voltages as a first read voltage and a second voltage, respectively, to read data from the cells of the memory cell array according to a characteristic of the cells of the memory cell array.

Abstract translation: 可与存储器系统一起使用的存储装置包括电压发生器到多个第一候选电压和多个第二候选电压，以及X解码器，以顺序地施加多个第一候选电压中的每一个，并且多个第二候选 电压到存储单元阵列的一个或多个单元，然后分别施加多个第一候选电压和多个第二候选电压中的一个作为第一读取电压和第二电压以从 根据存储单元阵列的单元的特性，存储单元阵列的单元。