公开(公告)号：US20140317626A1

公开(公告)日：2014-10-23

申请号：US14258336

申请日：2014-04-22

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Moo-Kyoung CHUNG ,  Soo-Jung RYU ,  Yeon-Gon CHO

IPC分类号： G06F9/46

CPC分类号： G06F9/466 ,  G06F8/45 ,  G06F9/3836 ,  G06F9/3851 ,  G06F9/3853 ,  G06F9/3887 ,  G06F9/3891

摘要： A processor for batch thread processing includes a central register file, and one or more function unit batches each including two or more function units and one or more ports to access the central register file. The function units of the function unit batches execute an instruction batch including one or more instructions to sequentially execute the one or more instructions in the instruction batch.

摘要翻译： 用于批处理线程处理的处理器包括中央寄存器文件和一个或多个功能单元批次，每个功能单元批次包括两个或多个功能单元和一个或多个端口以访问中央寄存器文件。 功能单元批次的功能单元执行包括一个或多个指令的指令批次，以顺序执行指令批次中的一个或多个指令。

公开(公告)号：US20140317388A1

公开(公告)日：2014-10-23

申请号：US14258622

申请日：2014-04-22

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Moo-Kyoung CHUNG ,  Soo-Jung RYU ,  Yeon-Gon CHO

IPC分类号： G06F9/30

CPC分类号： G06F9/30145

摘要： An apparatus and method for supporting a multi-mode. The apparatus for supporting a multi-mode may include an instruction distributor configured to select, according to a current execution mode, at least one instruction from among a plurality of received instructions that each include an operand and an opcode, and transfer the opcode included in each of at least one selected instruction to the plurality of functional units; an operand switch controller configured to generate, based on the operand included in each of the selected at least one instruction, switch configuration information for routing in order to execute the selected at least one instruction; and an operand switch configured to route, based on the switch configuration information, a functional unit output or a register file output to either a functional unit input or a register file input.

摘要翻译： 一种用于支持多模式的装置和方法。 用于支持多模式的装置可以包括指示分配器，其被配置为根据当前执行模式，从多个接收到的指令中选择每个包括操作数和操作码的至少一个指令，并且将包括在其中的操作码 对所述多个功能单元中的至少一个选择指令中的每一个; 操作数开关控制器，被配置为基于包括在所选择的至少一个指令中的每一个中的操作数来生成用于路由的交换配置信息，以执行所选择的至少一个指令; 以及操作数开关，被配置为基于所述开关配置信息将输出的功能单元输出或寄存器文件路由到功能单元输入或寄存器文件输入。

公开(公告)号：US20190155601A1

公开(公告)日：2019-05-23

申请号：US16256266

申请日：2019-01-24

申请人： Samsung Electronics Co., Ltd.

发明人： Moo-Kyoung CHUNG ,  Woong SEO ,  Ho-Young KIM ,  Soo-Jung RYU ,  Dong-Hoon YOO ,  Jin-Seok LEE ,  Yeon-Gon CHO ,  Chang-Moo KIM ,  Seung-Hun JIN

IPC分类号： G06F9/30

摘要： A swizzle pattern generator is provided to reduce an overhead due to execution of a swizzle instruction in vector processing. The swizzle pattern generator is configured to provide swizzle patterns with respect to data sets of at least one vector register or vector processing unit. The swizzle pattern generator may be reconfigurable to generate various swizzle patterns for different vector operations.

公开(公告)号：US20140109069A1

公开(公告)日：2014-04-17

申请号：US14051910

申请日：2013-10-11

申请人： SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION ,  SAMSUNG ELECTRONICS CO., LTD.

发明人： Jin-Hoo LEE ,  Moo-Kyoung CHUNG ,  Key-Young CHOI ,  Yeon-Gon CHO ,  Soo-Jung RYU

IPC分类号： G06F9/45

CPC分类号： G06F8/41 ,  G06F8/45

摘要： A method of compiling a program to be executed on a multicore processor is provided. The method may include generating an initial solution by mapping a task to a source processing element (PE) and a destination PE, and selecting a communication scheme for transmission of the task from the source PE to the destination PE, approximately optimizing the mapping and communication scheme included in the initial solution, and scheduling the task, wherein the communication scheme is designated in a compiling process.

摘要翻译： 提供了一种编译要在多核处理器上执行的程序的方法。 该方法可以包括通过将任务映射到源处理单元（PE）和目的地PE来生成初始解决方案，并且从源PE到目的地PE选择用于传输任务的通信方案，大致优化映射和通信 包括在初始解决方案中，并且调度任务，其中在编译过程中指定通信方案。

公开(公告)号：US20130326190A1

公开(公告)日：2013-12-05

申请号：US13892603

申请日：2013-05-13

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Moo-Kyoung CHUNG ,  Yeon-Gon CHO ,  Soo-Jung RYU

IPC分类号： G06F15/78

CPC分类号： G06F15/7867 ,  H03M7/30 ,  Y02D10/12 ,  Y02D10/13

摘要： A coarse-grained reconfigurable processor having an improved code compression rate and a code decompression method thereof are provided to reduce a capacity of a configuration memory and reduce power consumption in a processor chip. The coarse-grained reconfigurable processor includes a configuration memory configured to store reconfiguration information including a header storing a compression mode indicator and a compressed code for each of a plurality of units and a body storing at least one uncompressed code, a decompressor configured to specify a code corresponding to each of the plurality of units among the at least one uncompressed code within the body based on the compression mode indicator and the compressed code within the header, and a reconfigurator including a plurality of PEs and configured to reconfigure data paths of the plurality of PEs based on the code corresponding to each unit.

摘要翻译： 提供具有改进的代码压缩率和代码解压缩方法的粗粒度可重构处理器以减少配置存储器的容量并降低处理器芯片中的功耗。 粗粒度可重配置处理器包括：配置存储器，被配置为存储重新配置信息，包括存储多个单元中的每一个的压缩模式指示符和压缩代码的头部，以及存储至少一个未压缩代码的主体;解压缩器，被配置为指定 基于所述标题内的所述压缩模式指示符和所述压缩码，所述对应于所述身体内的所述至少一个未压缩码中的所述多个单元中的每一个的代码，以及包括多个PE的重新配置，并且被配置为重新配置所述多个PE中的数据路径 基于与每个单元相对应的代码。