公开(公告)号：US20200210626A1

公开(公告)日：2020-07-02

申请号：US16283725

申请日：2019-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Monika TKACZYK ,  Brian C. GRAYSON ,  Mohamad Basem BARAKAT ,  Eric C. QUINNELL ,  Bradley G. BURGESS

IPC: G06F21/72 ,  H04L9/08 ,  G06F9/38

Abstract: According to one general aspect, an apparatus may include a context-specific encryption key circuit configured to generate a key value, wherein the key value is specific to a context of a set of instructions. The apparatus may include a target address prediction circuit configured to provide a target address for a next instruction in the set of instructions. The apparatus may include a target address memory configured to store an encrypted version of the target address, wherein the target address is encrypted using, at least in part, the key value. The apparatus may further include an instruction fetch circuit configured to decrypt the target address using, at least in part, the key value, and retrieve the target address.

公开(公告)号：US20200210190A1

公开(公告)日：2020-07-02

申请号：US16374743

申请日：2019-04-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ryan J. HENSLEY ,  Fuzhou ZOU ,  Monika TKACZYK ,  Eric C. QUINNELL ,  James David DUNDAS ,  Madhu Saravana Sibi GOVINDAN

IPC: G06F9/38 ,  G06F9/30

Abstract: According to one general aspect, an apparatus may include an instruction fetch unit circuit configured to retrieve instructions from a memory. The apparatus may include an instruction decode unit configured to convert instructions into one or more micro-operations that are provided to an execution unit circuit. The apparatus may also include a micro-operation cache configured to store micro-operations. The apparatus may further include a branch prediction circuit configured to: determine when a kernel of instructions is repeating, store at least a portion of the kernel within the micro-operation cache, and provide the stored portion of the kernel to the execution unit circuit without the further aid of the instruction decode unit circuit.

公开(公告)号：US20200371811A1

公开(公告)日：2020-11-26

申请号：US16561004

申请日：2019-09-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Madhu Saravana Sibi GOVINDAN ,  Fuzhou ZOU ,  Anhdung NGO ,  Wichaya Top CHANGWATCHAI ,  Monika TKACZYK ,  Gerald David ZURASKI, JR.

IPC: G06F9/38 ,  G06F9/48

Abstract: According to one general aspect, an apparatus may include a branch prediction circuit configured to predict if a branch instruction will be taken or not. The apparatus may include a branch target buffer circuit configured to store a memory segment empty flag that indicates whether or not the memory segment after a target address includes at least one other branch instruction, wherein the memory segment empty flag was created during a commit stage of a prior occurrence of the branch instruction. The branch prediction circuit may be configured to skip over the memory segment if the memory segment empty flag indicates a lack of other branch instruction(s).