公开(公告)号：US11114364B2

公开(公告)日：2021-09-07

申请号：US16223642

申请日：2018-12-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hee-Jeong Kim ,  Juhyun Lyu ,  Un-Byoung Kang ,  Jongho Lee

IPC: H01L23/373 ,  H01L23/31 ,  H01L23/367

Abstract: Disclosed is a semiconductor package comprising first and second semiconductor structures spaced apart on a first substrate, a heat sink covering the first and second semiconductor structure and the first substrate, and a thermal interface material layer between the heat sink and the first and second semiconductor structures. The first semiconductor structure includes a first sidewall adjacent to the second semiconductor structure and a second sidewall opposite the first sidewall. The thermal interface material layer includes a first segment between the first and second semiconductor structures and a second segment protruding beyond the second sidewall. A first distance from a top surface of the first substrate to a lowest point of a bottom surface of the first segment is less than a second distance from the top surface of the first substrate to a lowest point of a bottom surface of the second segment.

公开(公告)号：US11735494B2

公开(公告)日：2023-08-22

申请号：US17408988

申请日：2021-08-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hee-Jeong Kim ,  Juhyun Lyu ,  Un-Byoung Kang ,  Jongho Lee

IPC: H01L23/373 ,  H01L23/31 ,  H01L23/367

CPC classification number: H01L23/3735 ,  H01L23/3185 ,  H01L23/367

Abstract: Disclosed is a semiconductor package comprising first and second semiconductor structures spaced apart on a first substrate, a heat sink covering the first and second semiconductor structure and the first substrate, and a thermal interface material layer between the heat sink and the first and second semiconductor structures. The first semiconductor structure includes a first sidewall adjacent to the second semiconductor structure and a second sidewall opposite the first sidewall. The thermal interface material layer includes a first segment between the first and second semiconductor structures and a second segment protruding beyond the second sidewall. A first distance from a top surface of the first substrate to a lowest point of a bottom surface of the first segment is less than a second distance from the top surface of the first substrate to a lowest point of a bottom surface of the second segment.

公开(公告)号：US11670565B2

公开(公告)日：2023-06-06

申请号：US17307181

申请日：2021-05-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyo-Chang Ryu ,  Chulwoo Kim ,  Juhyun Lyu ,  Sanghyun Lee ,  Yun Seok Choi

IPC: H01L23/367 ,  H01L25/065 ,  H01L23/00 ,  H01L25/00

CPC classification number: H01L23/3675 ,  H01L24/32 ,  H01L25/0655 ,  H01L23/367 ,  H01L25/50 ,  H01L2224/32237 ,  H01L2924/3511

Abstract: A semiconductor package includes a first substrate, a first chip structure and a second chip structure spaced apart from each other on the first substrate, a gap region being defined between the first and second chip structures, and a heat dissipation member covering the first chip structure, the second chip structure, and the first substrate, the heat dissipation member including a first trench in an inner top surface of the heat dissipation member, wherein the first trench vertically overlaps with the gap region and has a width greater than a width of the gap region, and wherein the first trench vertically overlaps with at least a portion of a top surface of the first chip structure or a portion of a top surface of the second chip structure.

公开(公告)号：US11569145B2

公开(公告)日：2023-01-31

申请号：US17188332

申请日：2021-03-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanghyun Lee ,  Juhyun Lyu ,  Unbyoung Kang ,  Chulwoo Kim ,  Jongho Lee

IPC: H01L23/36 ,  H01L23/40 ,  H01L25/065

Abstract: A semiconductor package includes a first semiconductor chip mounted on the package substrate, a second semiconductor mounted on the package substrate and set apart from the first semiconductor chip in a horizontal direction thereby forming a gap between the first semiconductor chip and the second semiconductor chip. The semiconductor package further includes a first thermal interface material layer formed in the gap and having a first modulus of elasticity and a second thermal interface material layer formed on each of the first semiconductor chip and the second semiconductor chip and having a second modulus of elasticity, wherein the first modulus of elasticity is less than the second modulus of elasticity.

公开(公告)号：US20210384096A1

公开(公告)日：2021-12-09

申请号：US17188332

申请日：2021-03-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanghyun Lee ,  Juhyun Lyu ,  Unbyoung Kang ,  Chulwoo Kim ,  Jongho Lee

IPC: H01L23/36 ,  H01L25/065 ,  H01L23/40

Abstract: A semiconductor package includes a first semiconductor chip mounted on the package substrate, a second semiconductor mounted on the package substrate and set apart from the first semiconductor chip in a horizontal direction thereby forming a gap between the first semiconductor chip and the second semiconductor chip. The semiconductor package further includes a first thermal interface material layer formed in the gap and having a first modulus of elasticity and a second thermal interface material layer formed on each of the first semiconductor chip and the second semiconductor chip and having a second modulus of elasticity, wherein the first modulus of elasticity is less than the second modulus of elasticity.