公开(公告)号：US10818728B2

公开(公告)日：2020-10-27

申请号：US15931089

申请日：2020-05-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joyoung Park ,  Seok-Won Lee ,  Seongjun Seo

IPC: H01L27/24 ,  H01L27/11519 ,  H01L27/06 ,  H01L27/11548 ,  H01L27/11575 ,  H01L27/11565 ,  H01L27/11582 ,  H01L27/11556

Abstract: A three-dimensional semiconductor device is provided as follows. A substrate includes a contact region, a dummy region, and a cell array region. A stack structure includes electrodes vertically stacked on the substrate. The electrodes are stacked to have a first stepwise structure on the contact region and a second stepwise structure in the dummy region. Ends of at least two adjacent electrodes in the second stepwise structure have first sidewalls vertically aligned so that horizontal positions of the first sidewalls are substantially the same.

公开(公告)号：US10825865B2

公开(公告)日：2020-11-03

申请号：US16804810

申请日：2020-02-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joyoung Park ,  Seok-Won Lee ,  Seongjun Seo

IPC: H01L27/24 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/11519 ,  H01L27/11548 ,  H01L27/11565 ,  H01L27/11575 ,  H01L27/06

Abstract: A three-dimensional semiconductor device is provided as follows. A substrate includes a contact region, a dummy region, and a cell array region. A stack structure includes electrodes vertically stacked on the substrate. The electrodes are stacked to have a first stepwise structure on the contact region and a second stepwise structure in the dummy region. Ends of at least two adjacent electrodes in the second stepwise structure have first sidewalls vertically aligned so that horizontal positions of the first sidewalls are substantially the same.

公开(公告)号：US10026749B2

公开(公告)日：2018-07-17

申请号：US15349084

申请日：2016-11-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinwoo Park ,  Jaeshin Park ,  Joyoung Park ,  Jiwoong Sue ,  Seok-Won Lee

IPC: H01L29/76 ,  H01L27/11582 ,  H01L21/768 ,  H01L23/528 ,  H01L27/02 ,  H01L29/06 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11575

Abstract: A semiconductor memory device includes a substrate that includes a first cell array region and a peripheral region, a plurality of stack structures that extend in the first direction on the first cell array region and are spaced apart from each other in a second direction crossing the first direction, an insulation layer that covers the stack structures, and at least one separation structure that extends in the second direction on the peripheral region and penetrates the insulation layer in a direction normal to a top surface of the substrate.

公开(公告)号：US11171152B2

公开(公告)日：2021-11-09

申请号：US16588067

申请日：2019-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chunghwan Yang ,  Joyoung Park ,  Taeyun Bae ,  Byungyong Choi

IPC: H01L27/11582 ,  H01L27/1157

Abstract: A three-dimensional flash memory device is described that may include a substrate, a plurality of cell gate patterns and a plurality of mold insulating layers alternately stacked on the substrate, and a vertical channel structure in contact with side surfaces of the plurality of cell gate patterns and side surfaces of the plurality of mold insulating layers. Each of the plurality of cell gate patterns may include a cell gate electrode and a blocking barrier pattern adjacently disposed on one side surface of the cell gate electrode. An inner side surface of the blocking barrier pattern may include an upper inner side surface, a middle inner side surface, and a lower inner side surface. The middle inner side surface of the blocking barrier pattern may face the one side surface of the cell gate electrode. The blocking barrier pattern may have a portion protruding toward the cell gate electrode at a connection point between the upper inner side surface of the blocking barrier pattern and the middle inner side surface of the blocking barrier pattern.

公开(公告)号：US10141372B2

公开(公告)日：2018-11-27

申请号：US15067833

申请日：2016-03-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joyoung Park ,  Seok-Won Lee ,  Seongjun Seo

IPC: H01L27/24 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/11519 ,  H01L27/11548 ,  H01L27/11565 ,  H01L27/11575 ,  H01L27/06

Abstract: A three-dimensional semiconductor device is provided as follows. A substrate includes a contact region, a dummy region, and a cell array region. A stack structure includes electrodes vertically stacked on the substrate. The electrodes are stacked to have a first stepwise structure on the contact region and a second stepwise structure in the dummy region. Ends of at least two adjacent electrodes in the second stepwise structure have first sidewalls vertically aligned so that horizontal positions of the first sidewalls are substantially the same.

公开(公告)号：US20200273912A1

公开(公告)日：2020-08-27

申请号：US15931089

申请日：2020-05-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joyoung Park ,  Seok-Won Lee ,  Seongjun Seo

IPC: H01L27/24 ,  H01L27/11519 ,  H01L27/06 ,  H01L27/11556 ,  H01L27/11575 ,  H01L27/11565 ,  H01L27/11582 ,  H01L27/11548

Abstract: A three-dimensional semiconductor device is provided as follows. A substrate includes a contact region, a dummy region, and a cell array region. A stack structure includes electrodes vertically stacked on the substrate. The electrodes are stacked to have a first stepwise structure on the contact region and a second stepwise structure in the dummy region. Ends of at least two adjacent electrodes in the second stepwise structure have first sidewalls vertically aligned so that horizontal positions of the first sidewalls are substantially the same.

公开(公告)号：US10483323B2

公开(公告)日：2019-11-19

申请号：US16178860

申请日：2018-11-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joyoung Park ,  Seok-Won Lee ,  Seongjun Seo

IPC: H01L27/24 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/11519 ,  H01L27/11548 ,  H01L27/11565 ,  H01L27/11575 ,  H01L27/06

Abstract: A three-dimensional semiconductor device is provided as follows. A substrate includes a contact region, a dummy region, and a cell array region. A stack structure includes electrodes vertically stacked on the substrate. The electrodes are stacked to have a first stepwise structure on the contact region and a second stepwise structure in the dummy region. Ends of at least two adjacent electrodes in the second stepwise structure have first sidewalls vertically aligned so that horizontal positions of the first sidewalls are substantially the same.

公开(公告)号：US20190081105A1

公开(公告)日：2019-03-14

申请号：US16178860

申请日：2018-11-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joyoung Park ,  Seok-Won Lee ,  Seongjun Seo

IPC: H01L27/24 ,  H01L27/11575 ,  H01L27/11565 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/06 ,  H01L27/11582 ,  H01L27/11519

CPC classification number: H01L27/2481 ,  H01L27/0688 ,  H01L27/11519 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11575 ,  H01L27/11582

Abstract: A three-dimensional semiconductor device is provided as follows. A substrate includes a contact region, a dummy region, and a cell array region. A stack structure includes electrodes vertically stacked on the substrate. The electrodes are stacked to have a first stepwise structure on the contact region and a second stepwise structure in the dummy region. Ends of at least two adjacent electrodes in the second stepwise structure have first sidewalls vertically aligned so that horizontal positions of the first sidewalls are substantially the same.