公开(公告)号：US20200043920A1

公开(公告)日：2020-02-06

申请号：US16382382

申请日：2019-04-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Min YOO ,  Ju Youn KIM ,  Hyung Joo NA ,  Bong Seok SUH ,  Joo Ho JUNG ,  Eui Chul HWANG ,  Sung Moon LEE

IPC: H01L27/088 ,  H01L29/78 ,  H01L21/762 ,  H01L29/40

Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.

公开(公告)号：US20250126882A1

公开(公告)日：2025-04-17

申请号：US18991796

申请日：2024-12-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Min YOO ,  Ju Youn KIM ,  Hyung Joo NA ,  Bong Seok SUH ,  Joo Ho JUNG ,  Eui Chul HWANG ,  Sung Moon LEE

IPC: H10D84/83 ,  H01L21/762 ,  H10D30/69 ,  H10D64/00

Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.

公开(公告)号：US20230378174A1

公开(公告)日：2023-11-23

申请号：US18230052

申请日：2023-08-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Min YOO ,  Ju Youn KIM ,  Hyung Joo NA ,  Bong Seok SUH ,  Joo Ho JUNG ,  Eui Chul HWANG ,  Sung Moon LEE

IPC: H01L27/088 ,  H01L29/40 ,  H01L21/762 ,  H01L29/78

CPC classification number: H01L27/0886 ,  H01L29/408 ,  H01L21/76224 ,  H01L29/7846

Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.

公开(公告)号：US20210366905A1

公开(公告)日：2021-11-25

申请号：US17393025

申请日：2021-08-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Min YOO ,  Ju Youn KIM ,  Hyung Joo NA ,  Bong Seok SUH ,  Joo Ho JUNG ,  Eui Chul HWANG ,  Sung Moon LEE

IPC: H01L27/088 ,  H01L29/40 ,  H01L21/762 ,  H01L29/78

Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.

公开(公告)号：US20210005603A1

公开(公告)日：2021-01-07

申请号：US17025497

申请日：2020-09-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Min YOO ,  Ju Youn KIM ,  Hyung Joo NA ,  Bong Seok SUH ,  Joo Ho JUNG ,  Eui Chul HWANG ,  Sung Moon LEE

IPC: H01L27/088 ,  H01L29/40 ,  H01L21/762 ,  H01L29/78

Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.

公开(公告)号：US20200043929A1

公开(公告)日：2020-02-06

申请号：US16368990

申请日：2019-03-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eui Chul HWANG ,  Ju Youn KIM ,  Hyung Joo NA ,  Bong Seok SUH ,  Sang Min YOO ,  Joo Ho JUNG ,  Sung Moon LEE

IPC: H01L27/092 ,  H01L27/02 ,  H01L29/423 ,  H01L29/08 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/311 ,  H01L21/306 ,  H01L21/762

Abstract: A semiconductor device and a method for fabricating the same, the device including an active pattern extending in a first direction on a substrate; a field insulating film surrounding a part of the active pattern; a first gate structure extending in a second direction on the active pattern and the field insulating film, a second gate structure spaced apart from the first gate structure and extending in the second direction on the active pattern and the field insulating film; and a first device isolation film between the first and second gate structure, wherein a side wall of the first gate structure facing the first device isolation film includes an inclined surface having an acute angle with respect to an upper surface of the active pattern, and a lowermost surface of the first device isolation film is lower than or substantially coplanar with an uppermost surface of the field insulating film.