-
公开(公告)号：US12224760B2
公开(公告)日：2025-02-11
申请号：US18422192
申请日：2024-01-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Youngsea Cho , Wan Kim , Jiseon Paek , Seunghyun Oh
Abstract: A current steering digital-to-analog converter includes a plurality of current cells each including a current source circuit and a current switch circuit to selectively output a current in response to a first input signal corresponding to a digital signal; a dummy current cell including a dummy current source circuit and a dummy current switch circuit to output a current in response to a second input signal; and a current switch bias circuit coupled to the dummy current cell to track a first voltage of an internal node of the dummy current source circuit and configured to generate a first bias voltage applied to the current switch circuit.
-
公开(公告)号：US11916562B2
公开(公告)日：2024-02-27
申请号：US17673127
申请日：2022-02-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Youngsea Cho , Wan Kim , Jiseon Paek , Seunghyun Oh
CPC classification number: H03M1/0617 , H03M1/38 , H03M1/66
Abstract: A current steering digital-to-analog converter includes a plurality of current cells each including a current source circuit and a current switch circuit to selectively output a current in response to a first input signal corresponding to a digital signal; a dummy current cell including a dummy current source circuit and a dummy current switch circuit to output a current in response to a second input signal; and a current switch bias circuit coupled to the dummy current cell to track a first voltage of an internal node of the dummy current source circuit and configured to generate a first bias voltage applied to the current switch circuit.
-
公开(公告)号：US11349514B2
公开(公告)日：2022-05-31
申请号：US17215503
申请日：2021-03-29
Applicant: Samsung Electronics Co., Ltd.
Inventor： Youngsea Cho , Jiseon Paek , Wan Kim , Daechul Jeong
Abstract: A radio frequency (RF) transmitter including a switched-capacitor digital-to-analog converter (SC-DAC) configured to selectively generate a first RF output signal having a first output power control range or a second RF output signal having a second output power control range from input signals received through a plurality of lines may be provided.
-
公开(公告)号：US11336242B2
公开(公告)日：2022-05-17
申请号：US16856159
申请日：2020-04-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Dongsu Kim , Junsuk Bang , Jiseon Paek , Youngho Jung
Abstract: A communication circuit, including a first supply modulator configured to provide a first supply voltage; a first power amplifier configured to generate a first output signal by amplifying a first input signal corresponding to a first operation frequency band; a second power amplifier configured to generate a second output signal by amplifying a second input signal corresponding to a second operation frequency band; and a switching circuit configured to selectively provide the first supply voltage from the first supply modulator to the second power amplifier based on a first switching signal according to an operation mode.
-
公开(公告)号：US11870471B2
公开(公告)日：2024-01-09
申请号：US18151711
申请日：2023-01-09
Applicant: Samsung Electronics Co., Ltd.
Inventor： Youngsea Cho , Jiseon Paek , Wan Kim , Daechul Jeong
CPC classification number: H04B1/0017 , H04B1/1676 , H04B1/62
Abstract: A digital radio frequency (RF) transmitter including processing circuitry configured to generate first through third pattern signals based on a pattern of an inphase (I)-quadrature (Q) binary data pair and a pattern of an inverted I-Q binary data pair, the first through third pattern signals having a same pattern and different phases, and a switched-capacitor digital-to-analog converter (SC-DAC) configured to remove an n-th harmonic component of an RF analog signal by amplifying the first through third pattern signals to have a certain magnitude ratio and synthesizing the amplified first through third pattern signals into the RF analog signal, where “n” is an integer of at least 3, may be provided.
-
Patent Agency Ranking
6.发明授权公开(公告)号：US11860658B2
公开(公告)日：2024-01-02
申请号：US17521187
申请日：2021-11-08
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ikhwan Kim , Takahiro Nomiyama , Jiseon Paek , Jaeyeol Han
CPC classification number: G05F1/565 , H02M3/00 , H02M3/1584 , H02M1/0045
Abstract: A regulating circuit including a first direct current (DC)-DC converter configured to apply a first supply voltage to a first node in a first mode and apply the first supply voltage to a second node in a second mode, a first low drop output (LDO) regulator connected to the first node, the first LDO regulator configured to provide an output voltage to an output node by regulating the first supply voltage of the first node, and a second LDO regulator connected to the first node, the second LDO regulator configured to provide an auxiliary current to the first node in the second mode may be provided.
-
7.发明公开公开(公告)号：US20230163790A1
公开(公告)日：2023-05-25
申请号：US18151711
申请日：2023-01-09
Applicant: Samsung Electronics Co., Ltd.
Inventor： Youngsea CHO , Jiseon Paek , Wan Kim , Daechul Jeong
CPC classification number: H04B1/0017 , H04B1/1676 , H04B1/62
Abstract: A digital radio frequency (RF) transmitter including processing circuitry configured to generate first through third pattern signals based on a pattern of an inphase (I)-quadrature (Q) binary data pair and a pattern of an inverted I-Q binary data pair, the first through third pattern signals having a same pattern and different phases, and a switched-capacitor digital-to-analog converter (SC-DAC) configured to remove an n-th harmonic component of an RF analog signal by amplifying the first through third pattern signals to have a certain magnitude ratio and synthesizing the amplified first through third pattern signals into the RF analog signal, where “n” is an integer of at least 3, may be provided.
-
公开(公告)号：US11552655B2
公开(公告)日：2023-01-10
申请号：US17196463
申请日：2021-03-09
Applicant: Samsung Electronics Co., Ltd.
Inventor： Youngsea Cho , Jiseon Paek , Wan Kim , Daechul Jeong
Abstract: A digital radio frequency (RF) transmitter including processing circuitry configured to generate first through third pattern signals based on a pattern of an inphase (I)-quadrature (Q) binary data pair and a pattern of an inverted I-Q binary data pair, the first through third pattern signals having a same pattern and different phases, and a switched-capacitor digital-to-analog converter (SC-DAC) configured to remove an n-th harmonic component of an RF analog signal by amplifying the first through third pattern signals to have a certain magnitude ratio and synthesizing the amplified first through third pattern signals into the RF analog signal, where “n” is an integer of at least 3, may be provided.
-
公开(公告)号：US11736115B2
公开(公告)日：2023-08-22
申请号：US17560400
申请日：2021-12-23
Applicant: Samsung Electronics Co., Ltd.
Inventor： Youngsea Cho , Wan Kim , Jiseon Paek , Seunghyun Oh
CPC classification number: H03M1/466 , H03M1/1245
Abstract: Provided are an analog-to-digital converter and/or an operating method thereof. The analog-to-digital converter includes a sample/hold circuit, a digital-to-analog converter, a comparing circuit, and a control logic circuit, wherein the digital-to-analog converter includes a first capacitor connected to a first comparison node and a first filtering node, a first reference voltage switch connected to the first filtering node and connected to a first delivery node or a first transmission node, a first pre-charge switch connected to the first filtering node or the first delivery node, and a first pre-charge capacitor connected to the first pre-charge switch and a ground voltage.
-
公开(公告)号：US20220368337A1
公开(公告)日：2022-11-17
申请号：US17673127
申请日：2022-02-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Youngsea CHO , Wan Kim , Jiseon Paek , Seunghyun Oh
IPC: H03M1/06
Abstract: A current steering digital-to-analog converter includes a plurality of current cells each including a current source circuit and a current switch circuit to selectively output a current in response to a first input signal corresponding to a digital signal; a dummy current cell including a dummy current source circuit and a dummy current switch circuit to output a current in response to a second input signal; and a current switch bias circuit coupled to the dummy current cell to track a first voltage of an internal node of the dummy current source circuit and configured to generate a first bias voltage applied to the current switch circuit.
-
-
-
-
-
-
-
-
-
Search Results
12
records
(took 0.017 seconds)
