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1.
公开(公告)号:US20240345944A1
公开(公告)日:2024-10-17
申请号:US18634559
申请日:2024-04-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: KI-HEUNG KIM , Taeyoung Oh , Taekwoon Kim , Jinseong Yun , Yoonjae Jeong , Hyongryol Hwang
IPC: G06F12/02
CPC classification number: G06F12/0223 , G06F2212/202
Abstract: A method of operating a memory configured to communicate with a memory controller, the method includes: temporarily storing a unique identification (ID) for each of a plurality of memory devices included in the memory to each of the plurality of memory devices; selecting a target memory device from among the plurality of memory devices; and permanently or substantially permanently programming, in the target memory device, a unique ID corresponding to the target memory device.
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公开(公告)号:US20230035640A1
公开(公告)日:2023-02-02
申请号:US17938780
申请日:2022-10-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyudong Lee , Young Yun , Sungjoo Park , Jinseong Yun
IPC: G11C5/14
Abstract: A memory module includes a serial presence detector (SPD) configured to detect a module identification (ID) through at least one module position identification terminal, and generate at least one of the module ID and a register address corresponding to the module ID. A power management unit (PMU) is responsive to at least one of the module ID and the register address generated by the SPD. The PMU is configured to set an on-time point and/or an off-time point of an internal clock signal based on at least one of the module ID and the register address corresponding to the module ID, and further configured to generate at least one internal power supply voltage in response to the internal clock signal. A plurality of memory devices are also provided, which are configured to receive the at least one internal power supply voltage and perform an operation in response to command/address signals.
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公开(公告)号:US20200342917A1
公开(公告)日:2020-10-29
申请号:US16709984
申请日:2019-12-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyudong Lee , Young Yun , Sungjoo Park , Jinseong Yun
IPC: G11C5/14
Abstract: A memory module includes a serial presence detector (SPD) configured to detect a module identification (ID) through at least one module position identification terminal, and generate at least one of the module ID and a register address corresponding to the module ID. A power management unit (PMU) is responsive to at least one of the module ID and the register address generated by the SPD. The PMU is configured to set an on-time point and/or an off-time point of an internal clock signal based on at least one of the module ID and the register address corresponding to the module ID, and further configured to generate at least one internal power supply voltage in response to the internal clock signal. A plurality of memory devices are also provided, which are configured to receive the at least one internal power supply voltage and perform an operation in response to command/address signals.
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公开(公告)号:US20200335140A1
公开(公告)日:2020-10-22
申请号:US16727066
申请日:2019-12-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yoo-Jeong Kwon , Jinseong Yun , Kyudong Lee
Abstract: A semiconductor memory module includes a memory printed circuit board (PCB) that includes first connectors, a second connector, and a third connector configured to be connectable with an external device, memory devices that are mounted on the memory PCB and are connected with the first connectors, and a power management integrated circuit that is mounted on the memory PCB, receives a first voltage through the second connector, generates a second voltage from the first voltage, and supplies the second voltage to the memory devices. The power management integrated circuit adjusts the second voltage depending on a difference between a signal received through the third connector and the second voltage.
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公开(公告)号:US12232260B2
公开(公告)日:2025-02-18
申请号:US17939546
申请日:2022-09-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Seungjin Lee , Jonghoon Kim , Kyoungsun Kim , Sungjoo Park , Jinseong Yun , Young-Ho Lee , Jeonghyeon Cho , Heejin Cho
Abstract: An electronic device includes: a multilayered base substrate including a plurality of substrate bases stacked on each other; a first conductive via and a second conductive via penetrating the substrate bases and spaced from each other; a conductive line electrically connecting the first conductive via and the second conductive via to each other and disposed on at least one of the substrate bases of the plurality of substrate bases; and an open stub including a first end and a second end, wherein the first end is connected to a connector of the conductive line, and the second end is opened.
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6.
公开(公告)号:US20240289058A1
公开(公告)日:2024-08-29
申请号:US18590324
申请日:2024-02-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Ki-Heung KIM , Taeyoung Oh , Taekwoon Kim , Jinseong Yun , Yoonjae Jeong , Hyongryol Hwang
IPC: G06F3/06
CPC classification number: G06F3/0659 , G06F3/0604 , G06F3/0683
Abstract: A method of operating a memory module that communicates with a memory controller includes: entering a one-time programmable (OTP) addressing mode based on an OTP command received from the memory controller; determining whether a guard key sequence is satisfied based on a plurality of mode register commands received from the memory controller; and programming, based on a determination that the guard key sequence is satisfied, a unique identifier (ID), corresponding to a target memory device, into the target memory device, among a plurality of memory devices included in the memory module.
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公开(公告)号:US11635779B2
公开(公告)日:2023-04-25
申请号:US17358123
申请日:2021-06-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jinseong Yun , Kyudong Lee , Jaejun Lee
IPC: G11C11/4074 , G05F1/575 , G06F1/28 , G11C11/4076 , G11C11/4093
Abstract: A power management integrated circuit (PMIC) includes a voltage regulator, a monitoring circuit, and a count register. The voltage regulator is configured to generate an output voltage. The monitoring circuit is configured to receive a feedback voltage of the output voltage, and to determine at each of periodic intervals whether the feedback voltage is outside a threshold voltage range. The count register is configured to store a count value indicative of a number of times the feedback voltage is determined by the monitoring circuit to be outside the threshold voltage range.
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公开(公告)号:US11079784B2
公开(公告)日:2021-08-03
申请号:US16801221
申请日:2020-02-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jinseong Yun , Kyudong Lee , Jaejun Lee
IPC: G11C5/14 , G05F1/575 , G11C11/4074 , G06F1/28 , G11C11/4076 , G11C11/4093
Abstract: A power management integrated circuit (PMIC) includes a voltage regulator, a monitoring circuit, and a count register. The voltage regulator is configured to generate an output voltage. The monitoring circuit is configured to receive a feedback voltage of the output voltage, and to determine at each of periodic intervals whether the feedback voltage is outside a threshold voltage range. The count register is configured to store a count value indicative of a number of times the feedback voltage is determined by the monitoring circuit to be outside the threshold voltage range.
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公开(公告)号:US10998012B2
公开(公告)日:2021-05-04
申请号:US16727066
申请日:2019-12-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yoo-Jeong Kwon , Jinseong Yun , Kyudong Lee
Abstract: A semiconductor memory module includes a memory printed circuit board (PCB) that includes first connectors, a second connector, and a third connector configured to be connectable with an external device, memory devices that are mounted on the memory PCB and are connected with the first connectors, and a power management integrated circuit that is mounted on the memory PCB, receives a first voltage through the second connector, generates a second voltage from the first voltage, and supplies the second voltage to the memory devices. The power management integrated circuit adjusts the second voltage depending on a difference between a signal received through the third connector and the second voltage.
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公开(公告)号:US10916274B2
公开(公告)日:2021-02-09
申请号:US16731908
申请日:2019-12-31
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jong-Geon Lee , Kyudong Lee , Jinseong Yun
IPC: G11C5/14 , G11C5/04 , G06F1/3234 , G06F1/3225
Abstract: A power management integrated circuit includes first pads, second pads, a third pad, and a fourth pad that are configured to be connected with an external device, a regulation block that receives first voltages from the first pads, converts the first voltages to second voltages, and outputs the second voltages to the second pads, a communication block that receives a command through the third pad and outputs an internal information request received together with the command responsive to the command, and a logic block that controls an operation of the regulation block, receives the internal information request from the communication block, and outputs internal state information to the fourth pad based on the internal information request.
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