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公开(公告)号：US11189651B2
公开(公告)日：2021-11-30
申请号：US16840663
申请日：2020-04-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kang Sun Lee , Seung Ho Shin , Hyung Jin Bae , Jin Ho Seo , Ji Hun Shin , Moo Sup Lim , Young Tae Jang , Young Kyun Jeong
IPC: H01L27/146 , H04N5/355 , H04N5/353 , H04N5/3745 , H01L31/0203
Abstract: An image sensor including: a first photodiode; a first circuit including an overflow transistor and a first transfer transistor connected to the first photodiode, a switch element connected to the first transfer transistor and a capacitor disposed between the first transfer transistor and the switch element, wherein the capacitor is a physical capacitor; a second photodiode; and a second circuit including a second transfer transistor connected to the second photodiode, a reset transistor connected to an output of the first circuit and a driving transistor connected to the second transfer transistor and the output of the first circuit.
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公开(公告)号：US09781369B2
公开(公告)日：2017-10-03
申请号：US14951763
申请日：2015-11-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Se Jun Kim , Jin Ho Seo , Won Baek Lee
CPC classification number: H04N5/374 , H04N5/353 , H04N5/35581 , H04N5/3592 , H04N5/3765 , H04N5/378
Abstract: An image sensor which operates in a global shutter mode is provided. The image sensor includes a pixel array comprising a plurality of pixels arranged in a plurality of rows and columns, a timing generator configured to generate row driver control signals which controls an integration period of a pixel of the plurality of pixels to include at least two sub integration periods, and a row driver configured to generate a plurality of row control signals which controls each of the rows in the pixel array based on the row driver control signals, wherein the timing generator is further configured to control a single image frame to include the integration period and a readout period of the pixel, based on the row driver control signals.
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公开(公告)号：US09860472B2
公开(公告)日：2018-01-02
申请号：US14990816
申请日：2016-01-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Hyeok Jong Lee , Jin Ho Seo , Se Jun Kim , Sung Ho Suh , Young Tae Jang
CPC classification number: H04N5/378 , H04N5/347 , H04N5/3658 , H04N5/374 , H04N5/3745 , H04N5/77
Abstract: An image sensor operating in a skip mode and reading out a pixel signal provided by at least one of a plurality of pixels and compensating for fixed pattern noise (FPN) in column-parallel pipelines. The image sensor includes; a switch signal generator that generates a first switch control signal and a second switch control signal in response to FPN location information characterizing a first pipeline among the column-parallel pipelines as a noisy pipeline generating FPN, and characterizing a second pipeline among the column-parallel pipelines as a quiet pipeline not generating FPN, a binning switch block including a first switch controlled by the first switch control signal and a second switch controlled by the second switch control signal, wherein the first switch control signal causes the first pipeline to be inactivated and the second switch control signal causes the second pipeline to be activated, and a binning block that performs a digital binning operation on digital signals provided via the column-parallel pipelines including the second pipeline.
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公开(公告)号：US09407849B2
公开(公告)日：2016-08-02
申请号：US14084705
申请日：2013-11-20
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sung Ho Suh , Yu Jin Park , Jin Ho Seo , Kwi Sung Yoo , Seung Hyun Lim , Seog Heon Ham , Kyoung Min Koh , Han Yang , Jae Cheol Yun , Yong Lim , Jae Jin Jung
CPC classification number: H04N5/378 , H04N5/3742
Abstract: An image sensor includes a first column pair and a second column pair among a plurality of columns of a pixel array, an analog-to-digital converter pair, and a switch arrangement circuit configured to connect the first column pair with the analog-to-digital converter pair in response to first switch control signals such that two rows among a plurality of rows in the pixel array are read during a single access time.
Abstract translation: 图像传感器包括像素阵列的多列之中的第一列对和第二列对，模数转换器对以及被配置为将第一列对与模拟 - 数字转换器对连接的开关布置电路， 数字转换器对响应于第一开关控制信号，使得在单个访问时间期间读取像素阵列中的多行中的两行。
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公开(公告)号：US09060118B2
公开(公告)日：2015-06-16
申请号：US13827277
申请日：2013-03-14
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jin Hun Shin , Ji Min Cheon , Dong Hun Lee , Hyeok Jong Lee , Jin Ho Seo , Woo Seok Choi , Seog Heon Ham
CPC classification number: H04N5/23212 , H04N5/3696
Abstract: Image sensors include an array of image sensor pixels therein. This array of image sensor pixels includes a first focus detection pixel and at least a first color pixel. A switching network is provided, which is electrically coupled to the array. This switching network may be configured to generate a first mixed image signal by electronically mixing a focus detection signal generated by the first focus detection pixel with at least one color pixel signal generated by the at least a first color pixel. The first focus detection pixel can be a color-blind pixel, which may include a light-blocking shield mask therein.
Abstract translation: 图像传感器包括其中的图像传感器像素阵列。 该图像传感器像素阵列包括第一焦点检测像素和至少第一颜色像素。 提供了一种与阵列电耦合的开关网络。 该切换网络可以被配置为通过将由第一焦点检测像素产生的焦点检测信号与由至少一个第一彩色像素生成的至少一个彩色像素信号电子混合来生成第一混合图像信号。 第一焦点检测像素可以是彩色盲像素，其可以在其中包括遮光屏蔽掩模。
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Patent Agency Ranking
6.发明授权公开(公告)号：US09055250B2
公开(公告)日：2015-06-09
申请号：US14276687
申请日：2014-05-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Yu Jin Park , Jin Ho Seo , Seog Heon Ham , Kwang Hyun Lee , Han Yang
IPC: H04N5/335 , H04N5/3745 , H04N5/357 , G01J1/46 , H04N5/378
CPC classification number: H04N5/3745 , G01J1/46 , H04N5/335 , H04N5/357 , H04N5/378
Abstract: A CDS circuit includes first capacitors; second capacitors; and a switch arrangement which, in response to a switch control signal, connects the first capacitors in series between a pixel signal output node and a ground to compress the pixel signal and connects the second capacitors in series between a ramp signal output node and the ground to compress the ramp signal, or connects the first capacitors in parallel between the pixel signal output node and a first input node of the comparator and connects the second capacitors in parallel between the ramp signal output node and a second input node of the comparator.
Abstract translation: CDS电路包括第一电容器; 第二电容器; 以及开关装置，其响应于开关控制信号将第一电容器串联连接在像素信号输出节点和地之间以压缩像素信号，并将第二电容器串联连接在斜坡信号输出节点和地之间 压缩斜坡信号，或者将像素信号输出节点和比较器的第一输入节点并联的第一电容器连接在斜坡信号输出节点和比较器的第二输入节点之间并联连接第二电容器。
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公开(公告)号：US20130321694A1
公开(公告)日：2013-12-05
申请号：US13827277
申请日：2013-03-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jin Hun Shin , Ji Min Cheon , Dong Hun Lee , Hyeok Jong Lee , Jin Ho Seo , Woo Seok Choi , Seog Heon Ham
IPC: H04N5/232
CPC classification number: H04N5/23212 , H04N5/3696
Abstract: Image sensors include an array of image sensor pixels therein. This array of image sensor pixels includes a first focus detection pixel and at least a first color pixel. A switching network is provided, which is electrically coupled to the array. This switching network may be configured to generate a first mixed image signal by electronically mixing a focus detection signal generated by the first focus detection pixel with at least one color pixel signal generated by the at least a first color pixel. The first focus detection pixel can be a color-blind pixel, which may include a light-blocking shield mask therein.
Abstract translation: 图像传感器包括其中的图像传感器像素阵列。 该图像传感器像素阵列包括第一焦点检测像素和至少第一颜色像素。 提供了一种与阵列电耦合的开关网络。 该切换网络可以被配置为通过将由第一焦点检测像素产生的焦点检测信号与由至少一个第一彩色像素生成的至少一个彩色像素信号电子混合来生成第一混合图像信号。 第一焦点检测像素可以是彩色盲像素，其可以在其中包括遮光屏蔽掩模。
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公开(公告)号：US20200235152A1
公开(公告)日：2020-07-23
申请号：US16840663
申请日：2020-04-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kang Sun Lee , Seung Ho Shin , Hyung Jin Bae , Jin Ho Seo , Ji Hun Shin , Moo Sup Lim , Young Tae Jang , Young Kyun Jeong
IPC: H01L27/146 , H04N5/355 , H04N5/3745 , H04N5/353
Abstract: An image sensor including: a first photodiode; a first circuit including an overflow transistor and a first transfer transistor connected to the first photodiode, a switch element connected to the first transfer transistor and a capacitor disposed between the first transfer transistor and the switch element, wherein the capacitor is a physical capacitor; a second photodiode; and a second circuit including a second transfer transistor connected to the second photodiode, a reset transistor connected to an output of the first circuit and a driving transistor connected to the second transfer transistor and the output of the first circuit.
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公开(公告)号：US10714517B2
公开(公告)日：2020-07-14
申请号：US16218704
申请日：2018-12-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kang Sun Lee , Seung Ho Shin , Hyung Jin Bae , Jin Ho Seo , Ji Hun Shin , Moo Sup Lim , Young Tae Jang , Young Kyun Jeong
IPC: H04N5/355 , H04N5/353 , H04N5/3745 , H01L27/146 , H01L31/0203
Abstract: An image sensor including: a first photodiode; a first circuit including an overflow transistor and a first transfer transistor connected to the first photodiode, a switch element connected to the first transfer transistor and a capacitor disposed between the first transfer transistor and the switch element, wherein the capacitor is a physical capacitor; a second photodiode; and a second circuit including a second transfer transistor connected to the second photodiode, a reset transistor connected to an output of the first circuit and a driving transistor connected to the second transfer transistor and the output of the first circuit.
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10.发明授权CDS circuit, image sensor including the same, and image processing device including the image sensor 有权CDS电路，包括其的图像传感器和包括图像传感器的图像处理装置公开(公告)号：US08994854B2
公开(公告)日：2015-03-31
申请号：US13771409
申请日：2013-02-20
Applicant: Samsung Electronics Co., Ltd.
Inventor： Yu Jin Park , Ji Min Cheon , Jin Ho Seo , Ji Hun Shin , Seog Heon Ham
IPC: H04N5/217 , H04N3/14 , H03K5/1252 , H04N5/378
CPC classification number: H03K5/1252 , H04N5/378
Abstract: A correlated double sampling (CDS) circuit includes a correction circuit configured to receive an input pixel signal through a first node via a column line, correct the input pixel signal, and output the corrected pixel signal through a second node; and a comparator including first and second input terminals, the first input terminal being connected to the second node and being configured to receive the corrected pixel signal, and the second input terminal configured to receive a ramp signal, the comparator being configured to compare the corrected pixel signal with the ramp signal and output a comparison signal indicating a result of the comparing, wherein the correction circuit includes, a first capacitor connected between the first and second nodes, and one or more metal lines disposed adjacent to the first capacitor, and wherein at least one other capacitor is formed by the first capacitor and the metal line.
Abstract translation: 相关双采样（CDS）电路包括校正电路，配置为经由列线接收通过第一节点的输入像素信号，校正输入像素信号，并通过第二节点输出经校正的像素信号; 以及比较器，包括第一和第二输入端子，所述第一输入端子连接到所述第二节点并且被配置为接收所述校正的像素信号，并且所述第二输入端子被配置为接收斜坡信号，所述比较器被配置为将所述经校正的 并且输出表示比较结果的比较信号，其中所述校正电路包括连接在所述第一和第二节点之间的第一电容器和与所述第一电容器相邻布置的一个或多个金属线，并且其中 至少一个电容器由第一电容器和金属线形成。
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