公开(公告)号：US20230171514A1

公开(公告)日：2023-06-01

申请号：US17963289

申请日：2022-10-11

Applicant: CANON KABUSHIKI KAISHA

Inventor： Hideo Kobayashi

IPC: H04N5/343 ,  H01L27/146 ,  H04N5/374 ,  H04N5/369

CPC classification number: H04N5/343 ,  H01L27/14612 ,  H04N5/3698 ,  H04N5/3742

Abstract: A photoelectric conversion apparatus included pixel circuits, signal lines, current sources, a switching circuit configured to switch a connection state among the plurality of signal lines and the plurality of current sources, and a control circuit configured to control the connection state of the switching circuit. The switching circuit can implement a first connection state in which a first signal line and a second signal line are insulated from each other, a first current source is electrically connected to the first signal line, and a second current source is electrically connected to the second signal line, and a second connection state in which at least the first current source is electrically connected to at least the second signal line. The control circuit selects the first and second connection states in first and second operation modes, respectively.

公开(公告)号：US11656374B2

公开(公告)日：2023-05-23

申请号：US17502424

申请日：2021-10-15

Applicant: HAMAMATSU PHOTONICS K.K.

Inventor： Tadashi Maruno ,  Eiji Toda ,  Mao Nakajima ,  Teruo Takahashi ,  Takafumi Higuchi

IPC: G01T1/24 ,  H04N5/374 ,  H04N5/3745 ,  H01L27/146 ,  G01J1/02 ,  H04N5/376 ,  H04N5/363 ,  H04N5/378 ,  G01T1/208

CPC classification number: G01T1/247 ,  H04N5/363 ,  H04N5/376 ,  H04N5/378 ,  H04N5/3742 ,  H04N5/37455 ,  H04N5/37457 ,  G01T1/208

Abstract: A photon counting device includes a plurality of pixels each including a photoelectric conversion element configured to convert input light to charge, and an amplifier configured to amplify the charge converted by the photoelectric conversion element and convert the charge to a voltage, an A/D converter configured to convert the voltages output from the amplifiers of the plurality of pixels to digital values; and a conversion unit configured to convert the digital value output from the A/D converter to the number of photons by referring to reference data, for each of the plurality of pixels, and the reference data is created based on a gain and an offset value for each of the plurality of pixels.

公开(公告)号：US20190199978A1

公开(公告)日：2019-06-27

申请号：US16223497

申请日：2018-12-18

Applicant: CANON KABUSHIKI KAISHA

Inventor： Hisashi Takado

IPC: H04N7/18 ,  H04N5/374 ,  H04N5/378 ,  H04N5/353

CPC classification number: H04N7/188 ,  H04N5/3532 ,  H04N5/3742 ,  H04N5/378

Abstract: An image sensing device includes a plurality of pixels and a receiver configured to receive, from an outside, a trigger signal that gives a first timing and a second timing. Each of the plurality of pixels includes a photoelectric converter, a first charge holding portion configured to hold charges generated by the photoelectric converter, and a second charge holding portion configured to hold charges generated by the photoelectric converter. In each of the plurality of pixels, the charges whose accumulation is started in the photoelectric converter in accordance with the first timing are held by the first charge holding portion, and the charges whose accumulation is started in the photoelectric converter in accordance with the second timing are held by the second charge holding portion.

公开(公告)号：US20190028666A1

公开(公告)日：2019-01-24

申请号：US16127922

申请日：2018-09-11

Applicant: STMicroelectronics (Research & Development) Limited

Inventor： Jeffrey M. RAYNOR

IPC: H04N5/374 ,  H04N5/378 ,  H01L27/146

CPC classification number: H04N5/3742 ,  H01L27/14609 ,  H01L27/14623 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14643 ,  H04N5/35581 ,  H04N5/3575 ,  H04N5/37452 ,  H04N5/378 ,  H04N5/379

Abstract: An electronic device includes a first integrated circuit die having formed therein photodiodes and readout circuitry for the photodiodes, with the readout circuitry including output pads exposed on a surface of the first integrated circuit die. A second integrated circuit die has formed therein storage capacitor structures for the photodiodes and digital circuitry for performing image processing on data stored in the storage capacitor structures, with the storage capacitor structures including input pads exposed on a surface of the second integrated circuit die. The first and second integrated circuit die are in a face to face arrangement such that the output pads of the first integrated circuit die face the input pads of the second integrated circuit die. An interconnect couples the output pads of the first integrated circuit die to the input pads of the second integrated circuit die.

公开(公告)号：US20180367160A1

公开(公告)日：2018-12-20

申请号：US15998842

申请日：2018-08-17

Applicant: OLYMPUS CORPORATION

Inventor： Masato Osawa ,  Yasunari Harada ,  Shuzo Hiraide ,  Hideki Kato

IPC: H03M1/46 ,  H04N5/378 ,  H04N9/04 ,  H04N5/3745

CPC classification number: H03M1/466 ,  H03M1/123 ,  H03M1/468 ,  H04N5/3742 ,  H04N5/37455 ,  H04N5/378 ,  H04N9/0455

Abstract: In an AD converter, a first DAC circuit performs a first operation in parallel with a second operation performed by a second DAC circuit, and the first DAC circuit performs the second operation in parallel with the first operation performed by the second DAC circuit. In the first operation, electric charge corresponding to an input signal of the first DAC circuit or an input signal of the second DAC circuit is sampled. In the second operation, an AD conversion is sequentially performed on the basis of the electric charge sampled in the first operation. The first DAC circuit and the second DAC circuit alternately perform the first operation and the second operation.

公开(公告)号：US20180309946A1

公开(公告)日：2018-10-25

申请号：US15955146

申请日：2018-04-17

Applicant: CANON KABUSHIKI KAISHA

Inventor： Takeru Ohya ,  Satoshi Koizumi ,  Masahiro Kobayashi

IPC: H04N5/359 ,  H04N5/374 ,  H04N5/3745 ,  H04N5/235 ,  H04N5/232

CPC classification number: H04N5/3597 ,  H04N5/23229 ,  H04N5/2355 ,  H04N5/3742 ,  H04N5/3745

Abstract: A photoelectric conversion device includes a plurality of pixels each of which includes a photoelectric converter that generates charges by photoelectric conversion, a first transfer unit that transfers charges in the photoelectric converter to a first holding portion, a second transfer unit that transfers charges in the first holding portion to a second holding portion, an amplifier unit that outputs a signal based on charges held in the second holding portion, and a third transfer unit that transfers charges of the photoelectric converter to a drain portion; and a control unit that, in an exposure period in which signal charges are accumulated in the photoelectric converter, changes a potential barrier formed by the third transfer unit with respect to the signal charges accumulated in the photoelectric converter from a first level to a second level that is higher than the first level.

公开(公告)号：US20180278877A1

公开(公告)日：2018-09-27

申请号：US15995614

申请日：2018-06-01

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Seiji YAMAHIRA

IPC: H04N5/378 ,  H04N5/374 ,  H04N5/355 ,  H01L27/146

CPC classification number: H04N5/378 ,  H01L27/14609 ,  H04N5/355 ,  H04N5/374 ,  H04N5/3742

Abstract: A solid-state image-capturing device includes a pixel array including a plurality of pixel circuits arranged in rows and columns. Each pixel circuit includes: a photoelectric conversion element that generates an electric charge through photoelectric conversion between a bias terminal and a first node, and amplifies the electric charge according to a bias voltage applied via the bias terminal and the first node; a transfer circuit that electrically connects the first node to a second node according to a first control signal; a reset circuit that applies a reset voltage to the second node according to a second control signal; an output circuit that reads out a voltage of the second node according to a third control signal; and an analog memory that is electrically connected to the second node according to a fourth control signal.

公开(公告)号：US10063797B2

公开(公告)日：2018-08-28

申请号：US15388023

申请日：2016-12-22

Applicant: RAYTHEON COMPANY

Inventor： John L. Vampola ,  Micky R. Harris ,  Bryan W. Kean ,  Steven Botts ,  Richard J. Peralta

IPC: H04N5/355 ,  H04N5/378 ,  H04N5/374 ,  H04N5/353

CPC classification number: H04N5/3559 ,  H04N5/3535 ,  H04N5/35527 ,  H04N5/3742 ,  H04N5/37452 ,  H04N5/378

Abstract: According to one aspect, embodiments herein provide a unit cell circuit comprising a photodetector configured to generate a photo-current in response to receiving light, a first integration capacitor configured to accumulate charge corresponding to the photo-current, a second integration capacitor configured to accumulate charge corresponding to the photo-current, a charge diverting switch coupled to the photodetector and configured to selectively couple the first integration capacitor to the second integration capacitor and divert the photo-current to the second integration capacitor in response to a voltage across the first integration capacitor exceeding a threshold level, and read-out circuitry coupled to the first integration capacitor and the charge diverting switch and configured to read-out a first voltage sample from the first integration capacitor corresponding to charge accumulated on the first integration capacitor and to read-out a second voltage sample from the second integration capacitor corresponding to charge accumulated on the second integration capacitor.

公开(公告)号：US20180176444A1

公开(公告)日：2018-06-21

申请号：US15899546

申请日：2018-02-20

Applicant: Sony Corporation

Inventor： Yasutaka Kimura

IPC: H04N5/235 ,  H04N5/374 ,  H04N9/04 ,  H04N5/3745 ,  H04N5/353 ,  H04N5/369 ,  H04N5/355

CPC classification number: H04N5/2353 ,  H04N5/3535 ,  H04N5/35563 ,  H04N5/35581 ,  H04N5/3692 ,  H04N5/374 ,  H04N5/3741 ,  H04N5/3742 ,  H04N5/37455 ,  H04N9/045 ,  H04N2209/045

Abstract: There is provided an image sensor including at least three pixel transfer control signal lines, on a per line basis, configured to control exposure start and end timings of a pixel in order for exposure timings of a plurality of the pixels constituting one line in a specific direction to have at least three patterns.

公开(公告)号：US09967494B2

公开(公告)日：2018-05-08

申请号：US15059970

申请日：2016-03-03

Applicant: CANON KABUSHIKI KAISHA

Inventor： Hirofumi Totsuka ,  Daisuke Yoshida ,  Yasushi Matsuno ,  Takashi Muto ,  Toru Koizumi

IPC: H04N5/374 ,  H04N5/3745 ,  H04N5/363 ,  H04N5/378 ,  H04N5/369

CPC classification number: H04N5/37457 ,  H04N5/363 ,  H04N5/3698 ,  H04N5/374 ,  H04N5/3742 ,  H04N5/378

Abstract: A photoelectric conversion apparatus includes a pixel. The pixel includes a transfer transistor, a reset transistor, an amplification transistor, and a selection transistor. The photoelectric conversion apparatus includes a control line, a voltage control unit, and a current source. The control line is electrically connected to a source of the amplification transistor. The voltage control unit controls the voltage of the control line. The current source outputs a reference current. A path of a current from the amplification transistor is separated from a path of the reference current. The photoelectric conversion apparatus includes a comparison unit configured to compare the current from the amplification transistor with the reference current. During a period in which a transistor connected to the gate of the amplification transistor is in a conductive state, the selection transistor is in a non-conductive state.