公开(公告)号：US20240234319A9

公开(公告)日：2024-07-11

申请号：US18323006

申请日：2023-05-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jee Woong KIM ,  Jin Kyu KIM ,  Ho Jun KIM ,  Jae Hyun AHN ,  So Ra YOU

IPC: H01L23/528 ,  H01L23/48 ,  H01L29/417 ,  H01L29/78

CPC classification number: H01L23/5286 ,  H01L23/481 ,  H01L29/41725 ,  H01L29/78

Abstract: A semiconductor device having simplicity in design and improved performance and methods for fabricating the same are provided. The semiconductor device includes a substrate including a frontside and a backside opposite the frontside, an electronic device on the frontside of the substrate, an interlayer insulating layer covering the electronic device, a frontside wiring structure on the interlayer insulating layer, a backside wiring structure on the backside of the substrate, and at least one unit chain connecting the electronic device with the backside wiring structure, the unit chain including a through plug passing through the substrate, a connection contact on the interlayer insulating layer, a first chain plug passing through the interlayer insulating layer to connect the through plug with the connection contact, and a second chain plug passing through the interlayer insulating layer to be connected to the through plug.

公开(公告)号：US20240136290A1

公开(公告)日：2024-04-25

申请号：US18323006

申请日：2023-05-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jee Woong KIM ,  Jin Kyu KIM ,  Ho Jun KIM ,  Jae Hyun AHN ,  So Ra YOU

IPC: H01L23/528 ,  H01L23/48 ,  H01L29/417 ,  H01L29/78

CPC classification number: H01L23/5286 ,  H01L23/481 ,  H01L29/41725 ,  H01L29/78

Abstract: A semiconductor device having simplicity in design and improved performance and methods for fabricating the same are provided. The semiconductor device includes a substrate including a frontside and a backside opposite the frontside, an electronic device on the frontside of the substrate, an interlayer insulating layer covering the electronic device, a frontside wiring structure on the interlayer insulating layer, a backside wiring structure on the backside of the substrate, and at least one unit chain connecting the electronic device with the backside wiring structure, the unit chain including a through plug passing through the substrate, a connection contact on the interlayer insulating layer, a first chain plug passing through the interlayer insulating layer to connect the through plug with the connection contact, and a second chain plug passing through the interlayer insulating layer to be connected to the through plug.

公开(公告)号：US20240021519A1

公开(公告)日：2024-01-18

申请号：US18120367

申请日：2023-03-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jee Woong KIM

IPC: H01L23/528 ,  H01L23/522 ,  H10B10/00 ,  H01L23/48

CPC classification number: H01L23/5283 ,  H01L23/5226 ,  H10B10/125 ,  H01L23/481

Abstract: A semiconductor device includes a substrate having first and second surfaces, first to third conductive line structures disposed on the first surface, extending in a first direction, and spaced apart from each other in a second direction, and a SRAM unit cell disposed on the first surface, and including first and second inverters connected to each other, a first pass transistor connected to the first inverter, a second pass transistor connected to the second inverter, a first gate electrode included in the first inverter, and a second gate electrode included in the first pass transistor, the first inverter and the first pass transistor are disposed between the first and third conductive line structures, the second inverter and the second pass transistor are disposed between the second and third conductive line structures, and the first and second gate electrodes are disposed between the first and third conductive line structures.