公开(公告)号：US20240062790A1

公开(公告)日：2024-02-22

申请号：US18384973

申请日：2023-10-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sun Young LIM ,  Seung Yong SHIN ,  Hyun Duk CHO

IPC: G11C7/10 ,  G11C7/22

CPC classification number: G11C7/1063 ,  G11C7/1057 ,  G11C7/1084 ,  G11C7/222

Abstract: A memory device including a plurality of nonvolatile memory chips each including a status output pin and a buffer chip configured to receive a plurality of internal state signals, which indicate states of the plurality of nonvolatile memory chips, from the status output pins and output an external state signal having a set period on the basis of the internal state signals indicating a particular state, wherein in a first section of the external state signal having the set period, a duty cycle of the external state signal determines depending on an identification (ID) of the nonvolatile memory chip which outputs the internal state signal indicating the particular state among the plurality of nonvolatile memory chips.

公开(公告)号：US20220172753A1

公开(公告)日：2022-06-02

申请号：US17409064

申请日：2021-08-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sun Young LIM ,  Seung Yong SHIN ,  Hyun Duk CHO

IPC: G11C7/10 ,  G11C7/22

Abstract: A memory device including a plurality of nonvolatile memory chips each including a status output pin and a buffer chip configured to receive a plurality of internal state signals, which indicate states of the plurality of nonvolatile memory chips, from the status output pins and output an external state signal having a set period on the basis of the internal state signals indicating a particular state, wherein in a first section of the external state signal having the set period, a duty cycle of the external state signal determines depending on an identification (ID) of the nonvolatile memory chip which outputs the internal state signal indicating the particular state among the plurality of nonvolatile memory chips.