公开(公告)号：US20140264517A1

公开(公告)日：2014-09-18

申请号：US14175076

申请日：2014-02-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngkuk KIM ,  Ho-Kyun AN ,  Jaehyun YEO ,  Badro IM ,  HanJin LIM ,  Sungho JANG ,  Insang JEON

IPC: H01L27/108 ,  H01L27/105

CPC classification number: H01L27/10894 ,  H01L21/823412 ,  H01L21/823462 ,  H01L27/10814 ,  H01L27/10861

Abstract: Semiconductor devices having a silicon-germanium channel layer and methods of forming the semiconductor devices are provided. The methods may include forming a silicon-germanium channel layer on a substrate in a peripheral circuit region and sequentially forming a first insulating layer and a second insulating layer on the silicon-germanium channel layer. The methods may also include forming a conductive layer on the substrate, which includes a cell array region and the peripheral circuit region, and patterning the conductive layer to form a conductive line in the cell array region and a gate electrode in the peripheral circuit region. The first insulating layer may be formed at a first temperature and the second insulating layer may be formed at a second temperature higher than the first temperature.

Abstract translation: 提供具有硅 - 锗沟道层的半导体器件和形成半导体器件的方法。 所述方法可以包括在外围电路区域中的衬底上形成硅 - 锗沟道层，并且在硅 - 锗沟道层上依次形成第一绝缘层和第二绝缘层。 该方法还可以包括在衬底上形成导电层，该导电层包括电池阵列区域和外围电路区域，以及图案化导电层以在电池阵列区域中形成导线以及在外围电路区域中形成栅极电极。 第一绝缘层可以在第一温度下形成，并且第二绝缘层可以在高于第一温度的第二温度下形成。

公开(公告)号：US20140120685A1

公开(公告)日：2014-05-01

申请号：US13791870

申请日：2013-03-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seong Hoon JEONG ,  Yoongoo KANG ,  Ho-Kyun AN ,  KONGSOO LEE ,  JAEJONG HAN

IPC: H01L45/00

CPC classification number: H01L27/2409 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144

Abstract: A semiconductor device and method of forming a semiconductor device is disclosed. The method includes forming a first ion-implanted layer having an amorphous state in a substrate; forming an impurity region of a first conductive type in the substrate; forming a semiconductor pattern on the substrate; forming a first doped region of the first conductive type in the semiconductor pattern; and forming a second doped region of a second conductive type contrary to the first conductive type in the semiconductor pattern. The first ion-implanted layer is formed by implanting carbons ions or germanium ions in the substrate.

Abstract translation: 公开了一种形成半导体器件的半导体器件和方法。 该方法包括在基板中形成具有非晶状态的第一离子注入层; 在衬底中形成第一导电类型的杂质区; 在所述基板上形成半导体图案; 在半导体图案中形成第一导电类型的第一掺杂区域; 以及形成与所述半导体图案中的所述第一导电类型相反的第二导电类型的第二掺杂区域。 第一离子注入层通过在基底中注入碳离子或锗离子而形成。

公开(公告)号：US20130175491A1

公开(公告)日：2013-07-11

申请号：US13729742

申请日：2012-12-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Jong HAN ,  Kong-Soo LEE ,  Yoon-Goo KANG ,  Ho-Kyun AN ,  Seong-Hoon JEONG

IPC: H01L45/00

CPC classification number: H01L45/04 ,  H01L27/101 ,  H01L27/1021 ,  H01L27/2409 ,  H01L45/06 ,  H01L45/124 ,  H01L45/141 ,  H01L45/143 ,  H01L45/144

Abstract: Semiconductor devices, and methods of manufacturing the same, include a field region in a semiconductor substrate to define an active region. An interlayer insulating layer is on the semiconductor substrate. A semiconductor pattern is within a hole vertically extending through the interlayer insulating layer. The semiconductor pattern is in contact with the active region. A barrier region is between the semiconductor pattern and the interlayer insulating layer. The barrier region includes a first buffer dielectric material and a barrier dielectric material. The first buffer dielectric material is between the barrier dielectric material and the semiconductor pattern, and the barrier dielectric material is spaced apart from both the semiconductor pattern and the active region.

Abstract translation: 半导体器件及其制造方法包括半导体衬底中的场区以限定有源区。 层间绝缘层位于半导体衬底上。 半导体图案在垂直延伸穿过层间绝缘层的孔内。 半导体图案与有源区域接触。 阻挡区域在半导体图案和层间绝缘层之间。 阻挡区域包括第一缓冲介电材料和阻挡介电材料。 第一缓冲电介质材料在阻挡介电材料和半导体图案之间，并且阻挡介电材料与半导体图案和有源区两者间隔开。