公开(公告)号：US20130178016A1

公开(公告)日：2013-07-11

申请号：US13736551

申请日：2013-01-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Choongbin YIM ,  Eunchul AHN ,  Taesung PARK ,  Hak-kyoon BYUN ,  Yongkwan LEE

IPC: H01L25/00

CPC classification number: H01L25/105 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00011 ,  H01L2224/83

Abstract: Methods of fabricating a package-on-package device and package-on-package devices fabricated by the same may be provided. According to inventive concepts, a back-grinding of a semiconductor chip to a target thickness may be performed after the semiconductor chip is molded by a molding layer. Accordingly, the semiconductor chip is relatively thick while forming a molding layer, and thus less susceptible to a warpage phenomenon, which for instance may occur during the forming a molding layer. Thus, relatively thin package-on-package device, which is less susceptible to the warpage phenomenon, may be achieved.

Abstract translation: 可以提供制造封装封装器件和由其制造的封装封装器件的方法。 根据本发明的概念，可以在通过模制层模制半导体芯片之后进行半导体芯片到目标厚度的背面磨削。 因此，半导体芯片在形成模制层的同时相对较厚，因此较不容易发生翘曲现象，例如可能在形成模制层期间发生。 因此，可以实现较不易受翘曲现象影响的较薄的封装封装器件。

公开(公告)号：US20130161800A1

公开(公告)日：2013-06-27

申请号：US13674328

申请日：2012-11-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hak-kyoon BYUN ,  Tae-hun KIM ,  Ji-hyun PARK ,  Byung-cheol JEON ,  Seung-jin CHEON

IPC: H01L23/18

CPC classification number: H01L23/18 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3121 ,  H01L25/0652 ,  H01L25/0655 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/01327 ,  H01L2924/18161 ,  H05K3/284 ,  H05K2203/1316 ,  H05K2203/1327 ,  H01L2924/00

Abstract: A printed circuit board (PCB) for molded underfill (MUF) and a PCB molding structure that may expand a range of applying the PCB and may resolve a problem of generation of a void during manufacturing of a semiconductor package. The PCB includes: a molding area on which a plurality of semiconductor chips are mounted and that is sealed; and a peripheral area that is formed around the molding area, contacts a mold for molding during a molding process, and includes a first side adjacent to a portion into which a molding material is injected and a second side that faces the first side that is adjacent to a portion from which air may be discharged, wherein an active area where the semiconductor chips are disposed in the molding area is disposed nearer the first side than to the second side.

Abstract translation: 用于模制底部填充物（MUF）的印刷电路板（PCB）和可以扩大施加PCB的范围的PCB模制结构，并且可以解决在制造半导体封装期间产生空隙的问题。 PCB包括：多个半导体芯片安装在其上并被密封的成型区域; 以及围绕成型区域形成的周边区域，在模制过程中与模具接触，并且包括与模制材料注入的部分相邻的第一侧和面向相邻的第一侧的第二侧 到可以排出空气的部分，其中在模制区域中设置半导体芯片的有源区域设置在比第二侧更靠近第一侧的位置。