Method of manufacturing semiconductor device
    1.
    发明授权
    Method of manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号:US09490160B2

    公开(公告)日:2016-11-08

    申请号:US14178959

    申请日:2014-02-12

    Inventor: Dong-Jin Lee

    CPC classification number: H01L21/76237 H01L27/115

    Abstract: A method of manufacturing a semiconductor device, the method including providing a substrate; forming a field trench in the substrate; and forming a diffusion barrier region under the field trench, wherein the diffusion barrier region includes carbon.

    Abstract translation: 一种制造半导体器件的方法,所述方法包括提供衬底; 在衬底中形成场沟; 以及在所述场沟下形成扩散阻挡区域,其中所述扩散阻挡区域包括碳。

    Semiconductor devices
    2.
    发明授权
    Semiconductor devices 有权
    半导体器件

    公开(公告)号:US09082647B2

    公开(公告)日:2015-07-14

    申请号:US14465982

    申请日:2014-08-22

    Abstract: There is provided a semiconductor device. The semiconductor device may include multiple contacts plugs, an insulation layer pattern, a metal oxide layer pattern, a metal pattern and a metal line. The contact plugs contact a substrate. The insulation layer pattern is formed between the contact plugs and has a top surface lower than those of the contact plugs. The metal oxide layer pattern is formed on the insulation layer pattern, and has a dielectric constant higher than that of silicon oxide. The metal pattern is formed on the metal oxide layer pattern and contacts sidewalls of the contact plugs. The metal line contacts top surfaces of the contact plugs and the metal pattern and extends thereon.

    Abstract translation: 提供了一种半导体器件。 半导体器件可以包括多个触点插头,绝缘层图案,金属氧化物层图案,金属图案和金属线。 接触插头接触基板。 绝缘层图案形成在接触插塞之间,并且具有比接触插塞低的顶表面。 金属氧化物层图案形成在绝缘层图案上,并且具有比氧化硅更高的介电常数。 金属图案形成在金属氧化物层图案上并接触接触插塞的侧壁。 金属线接触接触插塞的顶表面和金属图案并在其上延伸。

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