公开(公告)号：US20250116810A1

公开(公告)日：2025-04-10

申请号：US18887727

申请日：2024-09-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Daegon Kim ,  Junghoon Kang

IPC: G02B6/12 ,  G02B6/13 ,  H01L23/00 ,  H01L23/538 ,  H01L25/16

Abstract: A semiconductor package includes an interposer including an interposer optical waveguide, and a plurality of chiplets coupled onto the interposer and each including a semiconductor chip and a photonics chip electrically coupled to the semiconductor chip, wherein the photonics chip includes a photonic integrated circuit configured to input or output an optical signal, and an optical waveguide optically coupled to the interposer optical waveguide.

公开(公告)号：US20250093594A1

公开(公告)日：2025-03-20

申请号：US18747906

申请日：2024-06-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junghoon Kang ,  Daegon Kim

IPC: G02B6/42 ,  H01L23/00 ,  H01L23/13 ,  H01L23/48 ,  H01L23/498 ,  H01L23/538 ,  H01L25/16 ,  H01L27/144

Abstract: A semiconductor package includes a package substrate including an alignment hole extending inwardly from a side surface of the package substrate, a photonic integrated circuit chip disposed on the package substrate, the of the package substrate chip including a groove extending inwardly from a side surface of the PIC chip and a photo-electron conversion unit including an edge coupler, and an optical fiber connector including a frame, an optical fiber mounted in the groove of the of the package substrate chip and passing through the frame, and an alignment pin extending from the frame to an inside of the alignment hole, wherein the edge coupler is located at one end of the photo-electron conversion unit.

公开(公告)号：US20250125321A1

公开(公告)日：2025-04-17

申请号：US18775260

申请日：2024-07-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junghoon Kang ,  Daegon Kim

IPC: H01L25/16 ,  G02B6/42 ,  G02B6/43 ,  H01L23/00 ,  H01L23/13 ,  H01L23/31 ,  H01L23/48 ,  H01L23/49 ,  H01L23/538 ,  H01L27/144

Abstract: An example semiconductor package includes a package substrate, an electronic integrated circuit (EIC) package mounted on the package substrate, and a plurality of photonic integrated circuit (PIC) chips stacked on the EIC package. Each PIC chip of the plurality of PIC chips includes an upper groove recessed inwards from an upper surface of the PIC chip and being open toward a first side surface of the PIC chip. The EIC package includes a lower redistribution layer on the package substrate, an EIC chip mounted on the lower redistribution layer, a molding layer surrounding the EIC chip, a through via passing through the molding layer in a vertical direction and electrically connected with the lower redistribution layer, and an upper redistribution layer on the through via.

公开(公告)号：US20250123447A1

公开(公告)日：2025-04-17

申请号：US18787653

申请日：2024-07-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junghoon Kang ,  Daegon Kim

IPC: G02B6/42

Abstract: Provided is a semiconductor package including a package substrate and a photonic integrated circuit chip arranged on the package substrate, having a groove extending from a lateral surface of the photonic integrated circuit chip to the inside of the photonic integrated circuit chip, and including a photoelectric converter, wherein the photoelectric converter includes a light-emitting device configured to generate an optical signal, a first waveguide connected to the light-emitting device and providing a path through which the optical signal travels, a first grating coupler configured to output the optical signal, a second waveguide connected to first grating coupler, and a tunable coupler connected to the first waveguide and the second waveguide.

公开(公告)号：US20250125312A1

公开(公告)日：2025-04-17

申请号：US18773021

申请日：2024-07-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junghoon Kang ,  Daegon Kim

IPC: H01L25/065 ,  G02B6/42 ,  G02B6/43 ,  H01L23/00 ,  H01L23/13 ,  H01L23/48 ,  H01L23/498 ,  H01L23/538 ,  H01L27/144

Abstract: A semiconductor package includes a package substrate, an electronic integrated circuit chip mounted on the package substrate, a first photonic integrated circuit chip mounted on the electronic integrated circuit chip, the first photonic integrated circuit chip including a first groove recessed from a top surface and a side surface of the first photonic integrated circuit chip, and a second photonic integrated circuit chip mounted on the first photonic integrated circuit chip, the second photonic integrated circuit chip including a second groove recessed from a top surface and a side surface of the second photonic integrated circuit chip, wherein the second photonic integrated circuit chip is offset-stacked on the first photonic integrated circuit chip, wherein at least a portion of a bottom surface of the first groove of the first photonic integrated circuit chip is exposed to the outside.

公开(公告)号：US20250087651A1

公开(公告)日：2025-03-13

申请号：US18646858

申请日：2024-04-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junghoon Kang ,  Daegon Kim

IPC: H01L25/16 ,  H01L23/00 ,  H01L23/04 ,  H01L23/48 ,  H01L23/498

Abstract: A semiconductor package includes a package substrate including a first surface and a second surface opposite the first surface, a die disposed on the first surface of the package substrate, a stack structure disposed on the first surface of the package substrate and spaced apart from the die in a horizontal direction, and a socket disposed between the first surface of the package substrate and the stack structure and coupling the package substrate and the stack structure to each other, wherein the stack structure includes a plurality of optical integrated circuit chips stacked vertically with each other.

公开(公告)号：US20250149520A1

公开(公告)日：2025-05-08

申请号：US18780675

申请日：2024-07-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junghoon Kang ,  Daegon Kim

IPC: H01L25/18 ,  G02B6/12 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/538 ,  H01L27/144

Abstract: A semiconductor package including a package substrate, a plurality of chiplets located on the package substrate, the plurality of chiplets including a photonics chip and a semiconductor chip located on the photonics chip, and a plurality of photonics bridge chips located on the package substrate. The plurality of chiplets are spaced apart from each other in a horizontal direction, and each of the plurality of photonics bridge chips is located between the plurality of chiplets.

公开(公告)号：US20250149516A1

公开(公告)日：2025-05-08

申请号：US18780730

申请日：2024-07-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junghoon Kang ,  Daegon Kim

IPC: H01L25/10 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/49 ,  H01L23/498 ,  H01L23/538 ,  H01L27/144 ,  H10B80/00

Abstract: A semiconductor package including a package substrate, a plurality of photonics bridge chips located on the package substrate, a molding layer located on the package substrate, surrounding the plurality of photonics bridge chips, and including a plurality of via electrodes, and a plurality of chiplets located on the molding layer and the plurality of photonics bridge chips, the chiplets each including a photonics chip and a semiconductor chip located on the photonics chip, wherein the plurality of chiplets are spaced apart from each other in a horizontal direction, and at least two chiplets adjacent to each other from among the plurality of chiplets overlap one photonics bridge chip from among the plurality of photonics bridge chips in a vertical direction.