公开(公告)号：US20180022993A1

公开(公告)日：2018-01-25

申请号：US15719724

申请日：2017-09-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ji Ho YOU ,  In Hyung LEE ,  Tae Hoon KIM ,  Jong Won PARK ,  Chul Soo YOON ,  Chi Woo LEE

IPC: C09K11/61 ,  C09K11/02 ,  C09K11/57

CPC classification number: C09K11/617 ,  C09K11/025 ,  C09K11/57 ,  C09K11/61 ,  Y02B20/181

Abstract: There is provided a fluoride phosphor composite including: fluoride phosphor core particles that may be expressed by the empirical formula AxMFy:Mn4+, wherein A may be at least one selected from the group consisting of Li, Na, K, Rb, and Cs, M may be at least one selected from the group consisting of Si, Ti, Zr, Hf, Ge, and Sn, the composition ratio (x) of A may satisfy 2≦x≦3, the composition ratio (y) of F may satisfy 4≦y≦7, each fluoride phosphor composite particle may be coated with a Mn-free fluoride coating. The Mn-free fluoride coating may have a thickness less than or equal to 35% of the size of each fluoride phosphor composite particle.

公开(公告)号：US20240194641A1

公开(公告)日：2024-06-13

申请号：US18348011

申请日：2023-07-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chi Woo LEE ,  Hyeonjeong HWANG ,  Mi Hyae PARK

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/528 ,  H01L23/538

CPC classification number: H01L25/0652 ,  H01L23/3157 ,  H01L23/528 ,  H01L23/5383 ,  H01L24/08 ,  H01L24/16 ,  H01L25/0655 ,  H01L2224/08155 ,  H01L2224/16227

Abstract: Disclosed are semiconductor packages and fabrication methods thereof. The semiconductor package includes a substrate, a first semiconductor chip and a second semiconductor chip that are mounted on the substrate, and a bridge chip between a first lateral surface of the first semiconductor chip and a second lateral surface of the second semiconductor chip. The first semiconductor chip and the second semiconductor chip are electrically connected through the bridge chip. The first semiconductor chip includes a first chip pad on the first lateral surface. The bridge chip includes a first connection pad on a first surface of the bridge chip. The first lateral surface of the first semiconductor chip and the first surface of the bridge chip are in contact with each other. The first chip pad and the first connection pad include a same material and are bonded to each other to constitute an integral piece formed.