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    Variable resistance memory devices
    2.
    发明授权
    Variable resistance memory devices 有权

    公开(公告)号：US11121179B2

    公开(公告)日：2021-09-14

    申请号：US16377200

    申请日：2019-04-06

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Chang-Woo Sun

    IPC: H01L27/24 ,  H01L45/00

    Abstract: A variable resistance memory device may include a plurality of stacked structures. Each of the stacked structures may be formed on a substrate, and may include a lower electrode, a variable resistance pattern and a selection pattern sequentially stacked. A threshold voltage control pattern may be formed on the stacked structures, may extend in a second direction parallel to an upper surface of the substrate and may be configured to either increase or decrease a threshold voltage of each selection pattern. An upper electrode may be formed on the threshold voltage control pattern and may extend in the second direction. A first conductive line may contact respective lower surfaces of the lower electrodes of the stacked structures and extend in a first direction perpendicular to the second direction. A second conductive line may contact an upper surface of the upper electrode and extend in the second direction.

    Method of manufacturing a magnetoresistive random access memory device
    5.
    发明授权
    Method of manufacturing a magnetoresistive random access memory device 有权
    制造磁阻随机存取存储器件的方法

    公开(公告)号：US09337418B2

    公开(公告)日：2016-05-10

    申请号：US14208912

    申请日：2014-03-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jong-Chul Park ,  Jae-Hun Seo ,  Byong-Jae Bae ,  Chang-Woo Sun

    IPC: H01L43/12 ,  H01L27/22

    CPC classification number: H01L43/12 ,  G11C11/161 ,  H01L27/228

    Abstract: A method of manufacturing magnetoresistive random access memory (MRAM) device includes forming first and second patterns on a substrate in an alternating and repeating arrangement, forming a first capping layer on top surfaces of the first and second patterns, and removing first portions of the first capping layer and a portion of the second patterns thereunder to form first openings exposing the substrate. The method further includes forming source lines filling lower portions of the first openings, respectively, forming second capping layer patterns filling upper portions of the first openings, respectively, and removing second portions of the first capping layer and a portion of the second patterns thereunder to form second openings exposing the substrate. Then, contact plugs and pad layers are integrally formed and sequentially stacked on the substrate to fill the second openings.

    Abstract translation: 制造磁阻随机存取存储器（MRAM）器件的方法包括以交替和重复的布置在衬底上形成第一和第二图案，在第一和第二图案的顶表面上形成第一封盖层，以及去除第一和第二图案的第一部分 盖层和其下的第二图案的一部分以形成暴露基板的第一开口。 所述方法还包括分别形成填充所述第一开口的下部的源极线，分别形成填充所述第一开口的上部的第二封盖层图案，以及移除所述第一封盖层的第二部分及其下面的第二图案的一部分， 形成露出衬底的第二开口。 然后，将接触塞和垫层一体地形成并依次堆叠在基板上以填充第二开口。

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