公开(公告)号：US20210366884A1

公开(公告)日：2021-11-25

申请号：US17396308

申请日：2021-08-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： YANGGYOO JUNG ,  CHULWOO KIM ,  HYO-CHANG RYU ,  YUN SEOK CHOI

IPC: H01L25/16 ,  H01L23/528 ,  H01L23/48 ,  H01L23/367 ,  H01L23/00 ,  H01L21/78 ,  H01L23/498 ,  H01L21/683 ,  H01L21/48 ,  H01L25/00 ,  H01L23/538

Abstract: A semiconductor package may include a package substrate, a first interposer substrate mounted on the package substrate, and a first semiconductor chip disposed on the first interposer substrate. The first interposer substrate may include a first base layer, a second base layer disposed on the first base layer, circuit patterns provided in each of the first base layer and the second base layer, and an integrated device embedded in the first base layer and connected to at least one of the circuit patterns. A top surface of the first base layer may contact a bottom surface of the second base layer.

公开(公告)号：US20200312826A1

公开(公告)日：2020-10-01

申请号：US16583051

申请日：2019-09-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： YANGGYOO JUNG ,  CHULWOO KIM ,  HYO-CHANG RYU ,  YUN SEOK CHOI

IPC: H01L25/16 ,  H01L23/538 ,  H01L23/528 ,  H01L23/48 ,  H01L23/367 ,  H01L23/00 ,  H01L21/78 ,  H01L23/498 ,  H01L21/683 ,  H01L21/48 ,  H01L25/00

Abstract: A semiconductor package may include a package substrate, a first interposer substrate mounted on the package substrate, and a first semiconductor chip disposed on the first interposer substrate. The first interposer substrate may include a first base layer, a second base layer disposed on the first base layer, circuit patterns provided in each of the first base layer and the second base layer, and an integrated device embedded in the first base layer and connected to at least one of the circuit patterns. A top surface of the first base layer may contact a bottom surface of the second base layer.

公开(公告)号：US20210013156A1

公开(公告)日：2021-01-14

申请号：US16750370

申请日：2020-01-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： CHULWOO KIM

IPC: H01L23/00 ,  H01L25/065 ,  H01L23/538

Abstract: Disclosed are package substrates and semiconductor packages including the same. A package substrate may have a plurality of corner regions; a core layer having a first surface and a second surface; an upper layer, which includes a plurality of first wiring structures and a plurality of first dielectric layers; and a lower layer, which includes a plurality of second wiring structures and a plurality of second dielectric layers. Additionally, an area proportion of top surfaces of the first wiring structures in the upper layer relative to a top surface of the upper layer on each of the corner regions is less than an area proportion of top surfaces of the second wiring structures in the lower layer relative to a top surface of the lower layer on each of the corner regions.

公开(公告)号：US20200304345A1

公开(公告)日：2020-09-24

申请号：US16817760

申请日：2020-03-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHULWOO KIM ,  Yeonho Lee ,  Jonghyuck Choi

IPC: H04L25/02 ,  H04L25/08 ,  H04L25/493

Abstract: A differential signal processing device is described which includes an encoder configured to encode input data into one or more differential signals and a transmitter configured to sequentially transmit the one or more differential signals using a plurality of transmission lines. The encoder converts a plurality of bits, corresponding to a transmission time interval, among the input data into an encoding code array in the transmission time interval obtained by increasing an encoding unit time, encoded for each of the one or more differential signals, by an integer multiple.

公开(公告)号：US20230335540A1

公开(公告)日：2023-10-19

申请号：US18338372

申请日：2023-06-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： YANGGYOO JUNG ,  CHULWOO KIM ,  HYO-CHANG RYU ,  YUN SEOK CHOI

IPC: H01L25/16 ,  H01L23/528 ,  H01L23/367 ,  H01L25/00 ,  H01L23/00 ,  H01L21/78 ,  H01L23/498 ,  H01L23/48 ,  H01L21/683 ,  H01L21/48 ,  H01L23/538

CPC classification number: H01L25/16 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/3675 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/528 ,  H01L23/5386 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L24/97 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/81005 ,  H01L2224/95001

Abstract: A semiconductor package may include a package substrate, a first interposer substrate mounted on the package substrate, and a first semiconductor chip disposed on the first interposer substrate. The first interposer substrate may include a first base layer, a second base layer disposed on the first base layer, circuit patterns provided in each of the first base layer and the second base layer, and an integrated device embedded in the first base layer and connected to at least one of the circuit patterns. A top surface of the first base layer may contact a bottom surface of the second base layer.

公开(公告)号：US20230047923A1

公开(公告)日：2023-02-16

申请号：US17680425

申请日：2022-02-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KYOUNGHO KIM ,  CHULWOO KIM ,  HYUNSU PARK ,  JINCHEOL SIM

IPC: G11C29/12 ,  G11C29/36 ,  G11C29/46

Abstract: A semiconductor device includes a multilevel receiver including a signal determiner receiving a plurality of multilevel signals and outputting a result of mutual comparison of the plurality of multilevel signals as an N-bit signal, where N is a natural number equal to or greater than 2. A decoder restores a valid signal among the N-bit signals from the signal determiner to an M-bit data signal, where M is a natural number less than N. A clock generator receives a reference clock signal, generates an input clock signal using the reference clock signal, inputs the input clock signal to the signal determiner, and determines a phase of the input clock signal based on an occurrence probability of an invalid signal not restored to the M-bit data signal among the N-bit signals.