公开(公告)号：US20220181288A1

公开(公告)日：2022-06-09

申请号：US17542667

申请日：2021-12-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Heejung CHOI ,  Heeseok LEE ,  Junso PAK ,  Bongwee YU

IPC: H01L23/00 ,  H01L23/498 ,  H01L25/10

Abstract: A semiconductor package including: a plurality of lower pads; an upper pad; a semiconductor chip including a chip pad and configured to transmit or receive a first signal through the chip pad; a first wiring structure connecting the chip pad to a first lower pad among the plurality of lower pads; and a second wiring structure connecting a second lower pad among the plurality of lower pads to the upper pad, wherein the first lower pad and the second lower pad are separated from each other by a minimum distance between the plurality of lower pads.

公开(公告)号：US20240136255A1

公开(公告)日：2024-04-25

申请号：US18456865

申请日：2023-08-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bongwee YU ,  Junho HUH

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/498 ,  H01L25/065

CPC classification number: H01L23/481 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2225/06541 ,  H01L2924/381

Abstract: An integrated circuit device including a first semiconductor chip, a plurality of signal through silicon vias (TSV), a second semiconductor chip, a plurality of signal bumps and an interposer may be provided. The signal TSVs may be in the first semiconductor chip by a first pitch. The second semiconductor chip may be on the first semiconductor chip. The signal bumps may be on a lower surface of the second semiconductor chip by a second pitch wider than the first pitch. The interposer may be interposed between the first semiconductor chip and the second semiconductor chip and may be electrically connecting the signal TSVs with the signal bumps. Thus, an occupying area of the signal TSVs in the first semiconductor chip may be decreased so that the integrated circuit device may have a smaller size.

公开(公告)号：US20240234254A9

公开(公告)日：2024-07-11

申请号：US18456865

申请日：2023-08-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bongwee YU ,  Junho HUH

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/498 ,  H01L25/065

CPC classification number: H01L23/481 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2225/06541 ,  H01L2924/381

Abstract: An integrated circuit device including a first semiconductor chip, a plurality of signal through silicon vias (TSV), a second semiconductor chip, a plurality of signal bumps and an interposer may be provided. The signal TSVs may be in the first semiconductor chip by a first pitch. The second semiconductor chip may be on the first semiconductor chip. The signal bumps may be on a lower surface of the second semiconductor chip by a second pitch wider than the first pitch. The interposer may be interposed between the first semiconductor chip and the second semiconductor chip and may be electrically connecting the signal TSVs with the signal bumps. Thus, an occupying area of the signal TSVs in the first semiconductor chip may be decreased so that the integrated circuit device may have a smaller size.

公开(公告)号：US20220293514A1

公开(公告)日：2022-09-15

申请号：US17669049

申请日：2022-02-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bongwee YU ,  Iksu LEE ,  Jaegon LEE

IPC: H01L23/522 ,  H01L23/50 ,  H01L23/64 ,  H01L49/02 ,  G06F1/26

Abstract: A system on chip includes a processing unit including the first processing circuit and a second processing circuit, a connection circuit configured to form a path connecting one of the first processing circuit and the second processing circuit to an external capacitor, and a controller configured to control the connection circuit based on a state of at least one of the first processing circuit and the second processing circuit.