公开(公告)号：US20160343342A1

公开(公告)日：2016-11-24

申请号：US15146952

申请日：2016-05-05

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： SOOYEON KIM ,  WONTAE KIM ,  YOUNG-IL BAN ,  SUNKYU SON

IPC: G09G3/36

CPC classification number: G09G3/20 ,  G09G2330/06 ,  G09G2370/08

Abstract: A driving method of a display device includes sequentially outputting a plurality of eye tuning signals, receiving a plurality of checking information obtained from a data driving circuit, wherein the checking information indicates whether the data driving circuit is operating in response to each of the plurality of eye tuning signals, and selecting one optimal eye tuning signal among the plurality of eye tuning signals operating the data driving circuit on the basis of the checking information. Image signals are output on the basis of condition information of the optimal eye tuning signal.

Abstract translation: 显示装置的驱动方法包括顺序地输出多个眼睛调谐信号，接收从数据驱动电路获得的多个检查信息，其中检查信息指示数据驱动电路是否响应于多个 眼睛调谐信号，并且基于检查信息在操作数据驱动电路的多个眼睛调谐信号中选择一个最佳眼睛调谐信号。 基于最佳眼睛调谐信号的条件信息输出图像信号。

公开(公告)号：US20130207958A1

公开(公告)日：2013-08-15

申请号：US13840205

申请日：2013-03-15

Applicant: Samsung Display Co., Ltd.

Inventor： Jae-Han LEE ,  SUNKYU SON ,  Myong-Bin LIM ,  Inyong HWANG ,  OckJin KIM

IPC: G09G3/36

CPC classification number: G09G3/36 ,  G09G3/3614 ,  G09G3/3688 ,  G09G2310/027 ,  G09G2320/0233 ,  G09G2330/023

Abstract: A liquid crystal display having data driving apparatus comprising first and second output switches, a charge sharing line, and first and second charge sharing switches. The first output switch switches an electrical connection between a first amplifier providing a positive gradation voltage and a first data line in response to a control signal. The second output switch switches an electrical connection between a second amplifier providing a negative gradation voltage and a second data line in response to the control signal. The first charge sharing switch switches an electrical connection between the first data line and the charge sharing line in response to the control signal. The second charge sharing switch switches an electrical connection between the second data line and the charge sharing line in response to the control signal.

Abstract translation: 具有包括第一和第二输出开关，电荷共享线以及第一和第二电荷共享开关的数据驱动装置的液晶显示器。 第一输出开关响应于控制信号切换提供正灰度级电压的第一放大器与第一数据线之间的电连接。 响应于控制信号，第二输出开关切换提供负灰度级电压的第二放大器与第二数据线之间的电连接。 第一电荷共享开关响应于控制信号切换第一数据线和电荷共享线之间的电连接。 第二电荷共享开关响应于控制信号切换第二数据线和电荷共享线之间的电连接。

公开(公告)号：US20160125821A1

公开(公告)日：2016-05-05

申请号：US14806971

申请日：2015-07-23

Applicant: Samsung Display Co., LTD.

Inventor： Jae-Han LEE ,  Taegon KIM ,  SUNKYU SON

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G2310/0221 ,  G09G2310/08 ,  G09G2320/0223 ,  G09G2320/0233

Abstract: A driving circuit includes a receiver configured to receive an image control signal comprising a data signal and a clock signal, separate the data signal from the clock signal and output the separated data and clock signals, a clock recovery unit generating a reference clock signal based on the clock signal and generating a plurality of multi-phase clock signals having different phases from that of the reference clock signal, an output clock generation unit outputting an output clock signal in synchronization with the clock signal and the plurality of multi-phase clock signals, and a data output unit driving a plurality of data lines with a data driving signal corresponding to the data signal in synchronization with the output clock signal, and the output clock generation unit outputs the plurality of multi-phase clock signals.

Abstract translation: 驱动电路包括：接收器，被配置为接收包括数据信号和时钟信号的图像控制信号，将数据信号与时钟信号分离并输出分离的数据和时钟信号;时钟恢复单元，基于 所述时钟信号产生与所述参考时钟信号的相位不同的多个多相时钟信号;输出时钟产生单元，与所述时钟信号和所述多个多相时钟信号同步地输出输出时钟信号， 以及数据输出单元，与输出时钟信号同步地驱动与数据信号相对应的数据驱动信号的多条数据线，并且输出时钟产生单元输出多个多相时钟信号。

公开(公告)号：US20140055437A1

公开(公告)日：2014-02-27

申请号：US13738496

申请日：2013-01-10

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Young-Il BAN ,  SUNKYU SON ,  Kyungha KIM

IPC: H03M1/66 ,  G09G5/00

CPC classification number: H03M1/66 ,  G09G3/2007 ,  G09G5/001 ,  G09G2310/027 ,  G09G2320/0673 ,  G09G2330/028 ,  H03M1/662 ,  H03M1/76

Abstract: A display apparatus includes pixels, gate lines and data lines, a gate driver driving the gate lines, a data driver which drives the data lines, and a timing controller which controls the gate and data drivers and provides digital image signals to the data driver. The data driver includes a digital-to-analog converter which receives first and second gamma voltages and converting the digital image signals to analog image signals and an output buffer which outputs the analog image signals to the data lines. The digital-to-analog converter includes a resistor string which receives the first and second gamma voltages and generates gamma voltages, a look-up table which stores selection signals, a first decoder which selects the gamma voltages and outputs the selected gamma voltages as gamma reference voltages, and a second decoder which converts the digital image signals to the analog image signals based on the gamma reference voltages.

Abstract translation: 显示装置包括像素，栅极线和数据线，驱动栅极线的栅极驱动器，驱动数据线的数据驱动器，以及控制栅极和数据驱动器并向数据驱动器提供数字图像信号的定时控制器。 数据驱动器包括数模转换器，其接收第一和第二伽马电压并将数字图像信号转换为模拟图像信号，以及将模拟图像信号输出到数据线的输出缓冲器。 数模转换器包括接收第一和第二伽马电压并产生伽马电压的电阻串，存储选择信号的查找表，选择伽马电压并将所选伽马电压输出为伽马的第一解码器 参考电压，以及第二解码器，其基于伽马参考电压将数字图像信号转换为模拟图像信号。

公开(公告)号：US20160267871A1

公开(公告)日：2016-09-15

申请号：US14863929

申请日：2015-09-24

Applicant: SAMSUNG DISPLAY CO, LTD.

Inventor： WONTAE KIM ,  SOOYEON KIM ,  YOUNG-IL BAN ,  SUNKYU SON

IPC: G09G3/36 ,  G09G3/20

CPC classification number: G09G3/3688 ,  G09G3/3611 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0223 ,  G09G2370/08

Abstract: Provided is a data integrated circuit including: a data driving circuit, a shift register configured to output a plurality of latch clock signals, a latch configured to latch a plurality of image signals in response to the plurality of latch clock signals and output a plurality of digital image signals in response to a plurality of latch output signals, and a clock generator configured to divide a main clock signal into the plurality of latch output signals and output the plurality of divided latch output signals to the latch. At least two of the latch output signals are activated at different time intervals

Abstract translation: 提供了一种数据集成电路，包括：数据驱动电路，配置为输出多个锁存时钟信号的移位寄存器，配置成响应于多个锁存时钟信号而锁存多个图像信号的锁存器，并输出多个 响应于多个锁存输出信号的数字图像信号;以及时钟发生器，被配置为将主时钟信号分割成多个锁存输出信号，并将多个分割的锁存输出信号输出到锁存器。 至少两个锁存器输出信号以不同的时间间隔被激活

公开(公告)号：US20140035897A1

公开(公告)日：2014-02-06

申请号：US13778414

申请日：2013-02-27

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jae-Han LEE ,  SUNKYU SON ,  Sun-Koo KANG

IPC: G09G3/36

CPC classification number: G09G3/3696 ,  G09G3/3614 ,  G09G3/3685

Abstract: A display driving circuit includes a digital-to-analog converter configured to convert a digital image signal to an analog image signal, and a buffer circuit configured to receive the analog image signal and to output an output signal to be applied to a data line, where the buffer circuit includes an input stage configured to receive the analog image signal and to output a first signal, a first output stage configured to receive a first voltage and a second voltage and to output the output signal, a second output stage configured to receive a third voltage and a fourth voltage and to output the output signal, and a selection circuit configured to apply the first signal from the input stage to the first output stage or the second output stage in response to a mode signal.

Abstract translation: 显示驱动电路包括被配置为将数字图像信号转换为模拟图像信号的数模转换器，以及配置为接收模拟图像信号并输出​​要施加到数据线的输出信号的缓冲电路， 其中所述缓冲电路包括被配置为接收所述模拟图像信号并输出​​第一信号的输入级，被配置为接收第一电压和第二电压并输出所述输出信号的第一输出级，被配置为接收 第三电压和第四电压并输出输出信号;以及选择电路，被配置为响应于模式信号将来自输入级的第一信号施加到第一输出级或第二输出级。