公开(公告)号：US20220383821A1

公开(公告)日：2022-12-01

申请号：US17574864

申请日：2022-01-13

Applicant: Samsung Display Co., LTD.

Inventor： Sang Yong NO ,  Kwihyun KIM ,  Hwa-Rang LEE ,  Jiyeon CHOI

IPC: G09G3/3266

Abstract: A scan driver includes active stages. Each active stage includes a first transistor that resets a control node, a second transistor that transfers a previous carry signal to the control node, a third transistor that transfers a scan clock signal to a scan output node, a first capacitor electrically connected between the control node and the scan output node, a fourth transistor that transfers a first low voltage to the scan output node, a fifth transistor that transfers a carry clock signal to a carry output node, a sixth transistor that electrically connects the control node to the carry output node, and a seventh transistor that transfers a second low voltage to the control node.

公开(公告)号：US20200142231A1

公开(公告)日：2020-05-07

申请号：US16733564

申请日：2020-01-03

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sangyong NO ,  Kwihyun KIM ,  Jiho MOON ,  Keebum PARK

IPC: G02F1/1368 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1343 ,  G02F1/1362

Abstract: A liquid crystal display device includes a liquid crystal layer between first and second substrate. The first substrate includes a first and second sub-pixel areas. A first sub-pixel electrode is on the first substrate in the first sub-pixel area, and a first transistor is connected to a gate line, data line, and first sub-pixel electrode on the first substrate. A second sub-pixel electrode is on the first substrate in the second sub-pixel area, and a second transistor is connected to the gate line, the first transistor, and the second sub-pixel electrode. A first storage line is adjacent to one side of the first sub-pixel electrode. A second storage line is spaced from the first storage line and is adjacent to one side of the second sub-pixel electrode. A third transistor is connected to the gate line, second transistor, and second storage line.

公开(公告)号：US20170343868A1

公开(公告)日：2017-11-30

申请号：US15381138

申请日：2016-12-16

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kwihyun KIM ,  Jongjae LEE ,  Junghwan HWANG ,  Jongdo KEUM ,  Yoonsik PARK ,  Hongmin YOON

IPC: G02F1/1343 ,  G02F1/1362 ,  H01L29/786 ,  H01L27/12 ,  G09G3/36 ,  G02F1/1333 ,  G02F1/1339 ,  G02F1/1368

Abstract: A display apparatus includes a first substrate, a first dummy substrate on the first substrate, and a second dummy substrate extending from the first dummy substrate and bent. The second dummy substrate is on different side surfaces of the first substrate in a first direction. The display apparatus also includes a plurality of pixels on the first dummy substrate, a gate driver on the second dummy substrate and connected to the pixels, and a data driver connected to one side of the first dummy substrate in a second direction crossing the first direction and connected to the pixels.

公开(公告)号：US20170301702A1

公开(公告)日：2017-10-19

申请号：US15485194

申请日：2017-04-11

Applicant: Samsung Display Co., Ltd.

Inventor： Kwihyun KIM ,  Yoon-jang KIM ,  Sungryul KIM ,  Yunseok LEE

IPC: H01L27/12 ,  H01L29/786 ,  G09G3/36

CPC classification number: H01L27/1251 ,  G09G3/3648 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0426 ,  G09G2320/0219 ,  G09G2320/0223 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/41733 ,  H01L29/78696

Abstract: Deterioration of image quality in a display device due to kickback voltages may be reduced or prevented by varying parasite capacitance, the size of the semiconductor layer, and/or storage capacitance in each of thin film transistors for the pixels in the display. Various embodiments of display devices capable of reducing or preventing kickback voltages are disclosed.

公开(公告)号：US20170108723A1

公开(公告)日：2017-04-20

申请号：US15237673

申请日：2016-08-16

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sangyong NO ,  Kwihyun KIM ,  Jiho MOON ,  Keebum PARK

IPC: G02F1/1368 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1362 ,  G02F1/1343

Abstract: A liquid crystal display device includes a liquid crystal layer between first and second substrate. The first substrate includes a first and second sub-pixel areas. A first sub-pixel electrode is on the first substrate in the first sub-pixel area, and a first transistor is connected to a gate line, data line, and first sub-pixel electrode on the first substrate. A second sub-pixel electrode is on the first substrate in the second sub-pixel area, and a second transistor is connected to the gate line, the first transistor, and the second sub-pixel electrode. A first storage line is adjacent to one side of the first sub-pixel electrode. A second storage line is spaced from the first storage line and is adjacent to one side of the second sub-pixel electrode. A third transistor is connected to the gate line, second transistor, and second storage line.