公开(公告)号：US20240065048A1

公开(公告)日：2024-02-22

申请号：US18137367

申请日：2023-04-20

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sangyong NO

IPC: H10K59/131

CPC classification number: H10K59/131

Abstract: A display device includes a substrate, a light-emitting diode disposed on the substrate, a driving transistor disposed on the substrate, electrically connected to the light-emitting diode and including a plurality of channel areas, and a plurality of lower metal layers arranged between the substrate and the driving transistor and overlapping the plurality of channel areas, respectively.

公开(公告)号：US20160147120A1

公开(公告)日：2016-05-26

申请号：US14924195

申请日：2015-10-27

Applicant: Samsung Display Co., Ltd.

Inventor： Sangyong NO

IPC: G02F1/1343 ,  H01L27/12 ,  G02F1/1335 ,  G02F1/1368 ,  G02F1/1362

CPC classification number: G02F1/134309 ,  G02F1/133512 ,  G02F1/136286 ,  G02F1/1368 ,  H01L27/1218

Abstract: A display device includes a first substrate; a gate line on the first substrate; a data line disposed to intersect the gate line; a thin film transistor (TFT) connected to the gate line and the data line; a pixel electrode connected to the TFT; a second substrate opposed to the first substrate; and a light blocking member on the second substrate, the light blocking member at least partially overlapping the gate line, the data line, and the TFT and defining a pixel region. The pixel electrode may be disposed further away from the center portion of the pixel region, from the center portion of the first substrate toward the left and right sides thereof.

Abstract translation: 显示装置包括第一基板; 第一基板上的栅极线; 设置成与栅极线相交的数据线; 连接到栅极线和数据线的薄膜晶体管（TFT）; 连接到TFT的像素电极; 与第一基板相对的第二基板; 以及在所述第二基板上的遮光构件，所述遮光构件至少部分地与所述栅极线，所述数据线和所述TFT重叠并且限定像素区域。 像素电极可以被设置为更远离像素区域的中心部分，从第一基板的中心部分朝向其左侧和右侧。

公开(公告)号：US20200142231A1

公开(公告)日：2020-05-07

申请号：US16733564

申请日：2020-01-03

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sangyong NO ,  Kwihyun KIM ,  Jiho MOON ,  Keebum PARK

IPC: G02F1/1368 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1343 ,  G02F1/1362

Abstract: A liquid crystal display device includes a liquid crystal layer between first and second substrate. The first substrate includes a first and second sub-pixel areas. A first sub-pixel electrode is on the first substrate in the first sub-pixel area, and a first transistor is connected to a gate line, data line, and first sub-pixel electrode on the first substrate. A second sub-pixel electrode is on the first substrate in the second sub-pixel area, and a second transistor is connected to the gate line, the first transistor, and the second sub-pixel electrode. A first storage line is adjacent to one side of the first sub-pixel electrode. A second storage line is spaced from the first storage line and is adjacent to one side of the second sub-pixel electrode. A third transistor is connected to the gate line, second transistor, and second storage line.

公开(公告)号：US20170200420A1

公开(公告)日：2017-07-13

申请号：US15234441

申请日：2016-08-11

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sangyong NO ,  Jiho MOON

IPC: H01L27/12 ,  G09G3/34

CPC classification number: G09G3/3275 ,  G02F1/13452 ,  G02F2001/13606 ,  G06F13/1689 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2320/0219 ,  G11C19/287

Abstract: A display device includes a first substrate and a second substrate opposite to each other, a gate line on the first substrate, a gate driver which is connected to the gate line, a clock line which transmits a clock signal, a connecting line which connects the clock line and the gate driver, a common electrode on the second substrate, the common electrode overlapping the clock line and the connecting line, and a compensation pattern which overlaps the common electrode and extends from the connecting line.

公开(公告)号：US20170108723A1

公开(公告)日：2017-04-20

申请号：US15237673

申请日：2016-08-16

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sangyong NO ,  Kwihyun KIM ,  Jiho MOON ,  Keebum PARK

IPC: G02F1/1368 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1362 ,  G02F1/1343

Abstract: A liquid crystal display device includes a liquid crystal layer between first and second substrate. The first substrate includes a first and second sub-pixel areas. A first sub-pixel electrode is on the first substrate in the first sub-pixel area, and a first transistor is connected to a gate line, data line, and first sub-pixel electrode on the first substrate. A second sub-pixel electrode is on the first substrate in the second sub-pixel area, and a second transistor is connected to the gate line, the first transistor, and the second sub-pixel electrode. A first storage line is adjacent to one side of the first sub-pixel electrode. A second storage line is spaced from the first storage line and is adjacent to one side of the second sub-pixel electrode. A third transistor is connected to the gate line, second transistor, and second storage line.