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公开(公告)号：US20150115826A1
公开(公告)日：2015-04-30
申请号：US14329635
申请日：2014-07-11
Applicant: Samsung Display Co., Ltd.
Inventor： Bon-Sung KOO , Jong Jae LEE , Eui-Dong HWANG , Jun Dal KIM , Yang Uk NAM
CPC classification number: G09G3/3266 , G09G2320/041
Abstract: Provided is a display device, including: a plurality of pixels; a scan driver connected to a plurality of scanning lines connected to the plurality of pixels; and a gate signal generator configured to determine a level of a gate-on voltage according to ambient temperature and to supply the gate-on voltage to the scan driver, wherein the gate signal generator is further configured to apply a hysteresis characteristic to a thermistor voltage to vary according to the ambient temperature.
Abstract translation: 提供了一种显示装置，包括：多个像素; 连接到连接到所述多个像素的多条扫描线的扫描驱动器; 以及栅极信号发生器，被配置为根据环境温度确定栅极导通电压的电平并且向所述扫描驱动器提供所述栅极导通电压，其中所述栅极信号发生器还被配置为向热敏电阻电压施加滞后特性 根据环境温度而变化。
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公开(公告)号：US20230318860A1
公开(公告)日：2023-10-05
申请号：US18128323
申请日：2023-03-30
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Tae Young JIN , Jun Dal KIM , Hyun Su KIM , Kyung Youl MIN , Dong Won PARK , Jong Man BAE
CPC classification number: H04L12/12 , H04L25/4917
Abstract: A transmitter includes a transmission controller which outputs original data through an original data lane, an encoder which encodes the original data into encoded data and outputs the encoded data through an encoded data lane, and a transmission driver which outputs the encoded data at a speed of M (M is a real number greater than 0) gigabits per second through a transmission and reception interface. The transmission driver provides a first clock signal corresponding to an output speed to the encoder, the encoder provides a second clock signal having a second frequency less than a first frequency of the first clock signal to the transmission controller, the transmission controller outputs the original data based on the second clock signal, and the encoder outputs the encoded data based on the first clock signal.
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公开(公告)号：US20220399915A1
公开(公告)日：2022-12-15
申请号：US17574018
申请日：2022-01-12
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Hyun Su KIM , Kyung Youl MIN , Jun Dal KIM , Jong Man BAE
Abstract: A transceiver includes a transmitter and a receiver connected to each other through a first line and a second line. The transmitter transmits signals having a first voltage range to the first line and the second line in a first mode, and transmits signals having a second voltage range less than the first voltage range to the first line and the second line in a second mode. When transmitting a first payload to the receiver, the transmitter is sequentially driven in the first mode, the second mode, and the first mode, and the transmitter transmits a clock training pattern and the first payload in the second mode.
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公开(公告)号：US20230327845A1
公开(公告)日：2023-10-12
申请号：US18208127
申请日：2023-06-09
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Hyun Su KIM , Dong Won PARK , Jun Dal KIM , Kyung Youl MIN , Jong Man BAE , Jun Yong SONG , Tae Young JIN
IPC: H04L7/00
CPC classification number: H04L7/0037
Abstract: A transceiver includes a transmitter and a receiver connected to each other through a first line and a second line. The transmitter transmits signals having a first voltage range to the first line and the second line in a first mode, and transmits signals having a second voltage range less than the first voltage range to the first line and the second line in a second mode. In transmitting a (1−1)-th payload to the receiver, the transmitter is sequentially driven in the first mode, the second mode, and the first mode, and transmits a first clock training pattern and the (1−1)-th payload in the second mode. The receiver includes a clock data recovery circuit generating a first clock signal corresponding to the received first clock training pattern and a register storing first frequency information and first phase information of the first clock training pattern.
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公开(公告)号：US20220416841A1
公开(公告)日：2022-12-29
申请号：US17576169
申请日：2022-01-14
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Tae Young JIN , Dong Won PARK , Jun Dal KIM , Hyun Su KIM , Kyung Youl MIN , Jong Man BAE , Jun Yong SONG
IPC: H04B1/7156 , H04L7/00 , H04B1/38 , G09G3/20
Abstract: A transceiver device includes a transmitter and a receiver connected through first and second lines. A first frame period includes an active period for transmitting a first payload and a vertical blank period including a frequency hopping period. The transmitter transmits, to the first and second lines, signals having a first voltage range in a first mode and signals having a second voltage range in a second mode. The transmitter generates a first horizontal synchronization signal in the second mode except for the frequency hopping period, encodes the first horizontal synchronization signal to horizontal synchronization data, and generates a second horizontal synchronization signal in the first mode in the frequency hopping period. The transmitter adds a first clock training pattern to the horizontal synchronization data except for the frequency hopping period, and adds a second clock training pattern to first horizontal synchronization data after the frequency hopping period.
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Patent Agency Ranking
公开(公告)号：US20220397932A1
公开(公告)日：2022-12-15
申请号：US17704334
申请日：2022-03-25
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Jun Dal KIM , Dong Won PARK , Hyun Su KIM , Kyung Youl MIN , Jong Man BAE , Jun Yong SONG , Tae Young JIN
Abstract: A data receiver, which communicates with a data transmitter through a plurality of lanes, includes: a first reception unit which receives first data through a first lane; a second reception unit which receives second data through a second lane; and a detector which compares the first data and the second data to detect a skew between the first lane and the second lane. The first reception unit includes a first clock data recovery unit which recovers a first clock and first payload data from the first data. The first reception unit controls a loop speed of the first clock data recovery unit based on a skew level of the skew.
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公开(公告)号：US20140078188A1
公开(公告)日：2014-03-20
申请号：US13740711
申请日：2013-01-14
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Eui-Dong HWANG , Bon-Sung KOO , Jun Dal KIM , Jong Jae LEE , Se Young HEO
IPC: G09G3/36
CPC classification number: G09G3/3622 , G09G3/3648 , G09G3/3696 , G09G2320/0276 , G09G2330/026 , G09G2330/027
Abstract: A driving device of a display device includes: a reference voltage generator configured to receive a high potential power supply voltage, a low potential power supply voltage and a medium power supply voltage and to generate reference voltages between the high potential power supply voltage and the low potential power supply voltage, where the low potential power supply voltage is lower than the high potential power supply voltage, and the medium power supply voltage has a value between the high potential power supply voltage and the low potential power supply voltage; a gray reference voltage generator configured to receive and divide the reference voltages and to generate gray reference voltages; and a data driver configured to receive the gray reference voltages and the high and medium potential power supply voltages, and to generate data voltages using the gray reference voltages and the high and medium potential power supply voltages.
Abstract translation: 显示装置的驱动装置包括：参考电压发生器，被配置为接收高电位电源电压，低电位电源电压和中等电源电压，并且在高电位电源电压和低电平电压之间产生参考电压 潜在电源电压，其中低电位电源电压低于高电位电源电压，并且中间电源电压具有在高电位电源电压和低电位电源电压之间的值; 配置为接收和划分参考电压并产生灰色参考电压的灰色参考电压发生器; 以及数据驱动器，被配置为接收灰色参考电压和高和中等电位电源电压，并且使用灰色参考电压和高和中等电位电源电压产生数据电压。
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公开(公告)号：US20230170997A1
公开(公告)日：2023-06-01
申请号：US17959471
申请日：2022-10-04
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Dong Won PARK , Jun Dal KIM , Hyun Su KIM , Jong Man BAE , Jun Yong SONG , Tae Young JIN
IPC: H04B10/40 , H04B1/16 , H04B1/04 , G06F1/04 , H04B10/516
CPC classification number: H04B10/40 , H04B1/16 , H04B1/04 , G06F1/04 , H04B10/516
Abstract: A transceiver includes a transmitter and a receiver which are connected to each other through a first line and a second line. The transmitter transmits a first clock training pattern to the receiver in a first period, transmits a second clock training pattern and a first first payload to the receiver in a second period, and transmits a third clock training pattern and a second first payload to the receiver in a third period. The first clock training pattern, the second clock training pattern, and the third clock training pattern are variable based on a plurality of driving modes.
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公开(公告)号：US20230163763A1
公开(公告)日：2023-05-25
申请号：US17825622
申请日：2022-05-26
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Jong Man BAE , Hyun Su KIM , Jun Dal KIM , Dong Won PARK , Young Suk JUNG
IPC: H03K19/0175 , H03K7/02 , H03K9/02
CPC classification number: H03K19/017545 , H03K7/02 , H03K9/02
Abstract: A transceiver includes a transmitter and a receiver coupled to each other through a first line and a second line. The transmitter transmits a first voltage signal of a second logic level or a fourth logic level, among a first logic level, the second logic level, a third logic level, and the fourth logic level, through the first line. The transmitter transmits a second voltage signal of the first logic level or the third logic level through the second line. The receiver generates an output signal having one of four values based on the first voltage signal and the second voltage signal.
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公开(公告)号：US20220399986A1
公开(公告)日：2022-12-15
申请号：US17574860
申请日：2022-01-13
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Hyun Su KIM , Dong Won PARK , Jun Dal KIM , Kyung Youl MIN , Jong Man BAE , Jun Yong SONG , Tae Young JIN
IPC: H04L7/00
Abstract: A transceiver includes a transmitter and a receiver connected to each other through a first line and a second line. The transmitter transmits signals having a first voltage range to the first line and the second line in a first mode, and transmits signals having a second voltage range less than the first voltage range to the first line and the second line in a second mode. In transmitting a (1-1)-th payload to the receiver, the transmitter is sequentially driven in the first mode, the second mode, and the first mode, and transmits a first clock training pattern and the (1-1)-th payload in the second mode. The receiver includes a clock data recovery circuit generating a first clock signal corresponding to the received first clock training pattern and a register storing first frequency information and first phase information of the first clock training pattern.
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