公开(公告)号：US20150145840A1

公开(公告)日：2015-05-28

申请号：US14548124

申请日：2014-11-19

Applicant: Samsung Display Co., Ltd.

Inventor： Ji-Hun LIM ,  Hyeon-Sik KIM ,  Yeon-Gon MO ,  Byung-Du AHN ,  Hyang-Shik KONG

IPC: G09G3/36 ,  H01L27/12 ,  G06F3/041 ,  H01L31/103 ,  H01L29/786 ,  H01L31/032 ,  G06F3/042 ,  H01L27/144

CPC classification number: G09G3/3607 ,  G06F3/0412 ,  G06F3/042 ,  G09G3/02 ,  G09G3/3648 ,  G09G2300/0809 ,  G09G2360/141 ,  G09G2360/142 ,  G09G2360/144 ,  G09G2360/145 ,  H01L27/1225 ,  H01L27/1251 ,  H01L27/1446 ,  H01L29/7869

Abstract: A pixel circuit and a display device having the pixel circuit are disclosed. One inventive aspect includes a switching thin-film TFT and a light sensing TFT. The switching thin-film TFT includes a first source electrode electrically connected to a data line. A first gate electrode of the switching thin-film TFT and a second source electrode of the light sensing TFT are electrically connected to a first gate line. A first drain electrode of the switching thin-film TFT and a second drain electrode of the light sensing TFT are electrically connected to a pixel electrode.

Abstract translation: 公开了具有像素电路的像素电路和显示装置。 本发明的一个方面包括开关薄膜TFT和感光TFT。 开关薄膜TFT包括与数据线电连接的第一源电极。 开关薄膜TFT的第一栅电极和感光TFT的第二源电极电连接到第一栅极线。 开关薄膜TFT的第一漏电极和感光TFT的第二漏极电连接到像素电极。

公开(公告)号：US20150255278A1

公开(公告)日：2015-09-10

申请号：US14478273

申请日：2014-09-05

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Byung-Du AHN ,  Tae-Young KIM ,  Yeon-Gon MO

IPC: H01L21/02 ,  G02F1/1368 ,  H01L27/32 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L21/02472 ,  G02F1/1368 ,  H01L21/02441 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/3248 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

Abstract: A thin film transistor including a gate electrode; an active layer insulated from the gate electrode; a source electrode and a drain electrode that are insulated from the gate electrode and are electrically connected to the active layer; a first etch stopper layer that is formed of an insulation material and contacts a portion of the active layer located between areas of the active layer that are electrically connected to the source electrode and the drain electrode; a second etch stopper layer on the first etch stopper layer, the second etch stopper layer being formed of an insulation material of a same type as the insulation material used to form the first etch stopper layer, the second etch stopper layer having a higher density than the first etch stopper layer; and a third etch stopper layer on the second etch stopper layer.

Abstract translation: 一种薄膜晶体管，包括栅电极; 与栅电极绝缘的有源层; 源电极和漏电极，与栅电极绝缘并且电连接到有源层; 第一蚀刻停止层，其由绝缘材料形成并且与位于有源层的与源电极和漏电极电连接的区域之间的有源层的一部分接触; 在第一蚀刻停止层上的第二蚀刻停止层，第二蚀刻停止层由与用于形成第一蚀刻停止层的绝缘材料相同类型的绝缘材料形成，第二蚀刻停止层的密度高于 第一蚀刻停止层; 以及第二蚀刻停止层上的第三蚀刻停止层。

公开(公告)号：US20150069382A1

公开(公告)日：2015-03-12

申请号：US14467848

申请日：2014-08-25

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Byung-Du AHN ,  Ji-Hun LIM ,  Jin-Hyun PARK ,  Hyun-Jae KIM

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L29/78633 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/1262 ,  H01L29/7869

Abstract: A thin film transistor substrate includes a substrate, a data line disposed on the substrate and which extends substantially in a predetermined direction, a light blocking layer disposed on the substrate and including a metal oxide including zinc manganese oxide, zinc cadmium oxide, zinc phosphorus oxide or zinc tin oxide, a gate electrode disposed on the light blocking layer, a signal electrode including a source electrode and a drain electrode spaced apart from the source electrode, where the source electrode is connected to the data line, and a semiconductor pattern disposed between the source electrode and the drain electrode.

Abstract translation: 薄膜晶体管基板包括基板，设置在基板上并且基本上沿预定方向延伸的数据线，设置在基板上的遮光层，并且包括包含氧化锰锌，氧化锌锌，氧化锌锌的金属氧化物 或氧化锌锡，设置在所述遮光层上的栅电极，包括源电极和与所述源电极间隔开的漏电极的信号电极，所述源电极与所述数据线连接，以及设置在所述源电极之间的半导体图案， 源电极和漏电极。

公开(公告)号：US20150140699A1

公开(公告)日：2015-05-21

申请号：US14455805

申请日：2014-08-08

Applicant: Samsung Display Co., Ltd. ,  Industry-Academic Cooperation Foundation, Yonsei University

Inventor： Yeon-Hong Kim ,  Byung-Du AHN ,  Hyeon-Sik KIM ,  Yeon-Gon MO ,  Ji-Hun LIM ,  Hyun-Jae KIM

IPC: H01L21/02 ,  H01L51/56

CPC classification number: H01L21/02664 ,  H01L21/02422 ,  H01L21/02488 ,  H01L21/02554 ,  H01L21/02565 ,  H01L2227/323

Abstract: A method of forming an oxide semiconductor device may be provided. In the method, a substrate comprising a first major surface and a second major surface that faces away from the first major surface may be provided. An oxide semiconductor device may be formed over the first major surface to provide an intermediate device, and the semiconductor device may comprise an oxide active layer. The intermediate device may be subjected to ultraviolet (UV) light (e.g., ultraviolet ray irradiation process) for a first period, and subjected to heat (e.g., thermal treatment process) for a second period. The first and second periods may at least partly overlap.

Abstract translation: 可以提供形成氧化物半导体器件的方法。 在该方法中，可以提供包括第一主表面和远离第一主表面的第二主表面的基板。 可以在第一主表面上形成氧化物半导体器件以提供中间器件，并且半导体器件可以包括氧化物有源层。 中间装置可以经受第一阶段的紫外线（UV）光（例如紫外线照射处理），并进行第二时段的加热（例如热处理）。 第一和第二周期可以至少部分重叠。

公开(公告)号：US20140346498A1

公开(公告)日：2014-11-27

申请号：US14262769

申请日：2014-04-27

Applicant: Samsung Display Co., Ltd. ,  Kobe Steel, LTD.

Inventor： Byung-Du AHN ,  Gun-Hee KIM ,  Jun-Hyung LIM ,  Toshihiro KUGIMIYA ,  Hiroshi GOTO ,  Aya MIKI ,  Shinya MORITA

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L29/66969 ,  H01L29/78633 ,  H01L29/78693

Abstract: A thin film transistor includes a gate electrode, a channel overlapped with the gate electrode, a source electrode contacting the channel, and a drain electrode spaced apart from the source electrode and contacting the channel. The channel includes indium-zinc-tin oxide sourced from a source including a single phase indium-zinc-tin oxide.

Abstract translation: 薄膜晶体管包括栅电极，与栅电极重叠的沟道，与沟道接触的源电极以及与源电极间隔开并与沟道接触的漏电极。 该通道包括源自包括单相铟 - 锌 - 锡氧化物的源的铟 - 锌 - 锡氧化物。