Gate driving circuit and display apparatus including the same
    2.
    发明授权
    Gate driving circuit and display apparatus including the same 有权
    栅极驱动电路及包括其的显示装置

    公开(公告)号:US09524690B2

    公开(公告)日:2016-12-20

    申请号:US14461359

    申请日:2014-08-15

    Abstract: A gate driving circuit includes: a pull-up controller applying a carry signal of one of previous stages to a first node in response to the carry signal of the one of the previous stages; a pull-up part outputting a clock signal as an N-th gate output signal; a carry part outputting the clock signal as an N-th carry signal; a first pull-down part pulling down the signal at the first node to a second off voltage; a second pull-down part pulling down the N-th gate output signal to a first off voltage; an inverting part generating an inverting signal based on the clock signal and the second off voltage to output the inverting signal to an inverting node; and a reset part outputting a reset signal to the inverting node.

    Abstract translation: 门驱动电路包括:上拉控制器,响应于前一级之一的进位信号,将先前级之一的进位信号应用于第一节点; 输出时钟信号作为第N栅极输出信号的上拉部分; 输出时钟信号作为第N个进位信号的进位部分; 第一下拉部分,将第一节点处的信号下拉到第二关断电压; 第二下拉部分,将第N栅极输出信号下拉到第一关断电压; 反相部分基于时钟信号和第二截止电压产生反相信号,以将反相信号输出到反相节点; 以及将复位信号输出到反相节点的复位部分。

    Scan driver including stage circuit for reducing leakage current
    5.
    发明授权
    Scan driver including stage circuit for reducing leakage current 有权
    扫描驱动器,包括降低漏电流的电路

    公开(公告)号:US09524674B2

    公开(公告)日:2016-12-20

    申请号:US14456976

    申请日:2014-08-11

    Abstract: A stage circuit includes a first driver, a second driver, a first output unit, a second output unit and a controller. The first driver controls voltages of first and second nodes, according to a first power source, a third power source, a start signal or a carry signal of a previous stage input to a first input terminal, and a clock signal supplied to a second input terminal. The second driver controls voltages of third and fourth nodes, according to voltages of the first power source, the third power source, the first input terminal and the first and second nodes. The first output unit outputs a carry signal to a first output terminal, according to voltages of the first power source, the second input terminal and the third and fourth nodes. The second output unit outputs a scan signal to a second output terminal, according to voltages of the second power source, the second input terminal and the third and fourth nodes. The controller is electrically coupled to the first output terminal and the second driver.

    Abstract translation: 舞台电路包括第一驱动器,第二驱动器,第一输出单元,第二输出单元和控制器。 第一驱动器根据第一电源,第三电源,开始信号或前一级输入到第一输入端的进位信号来控制第一和第二节点的电压,以及提供给第二输入端的时钟信号 终奌站。 第二驱动器根据第一电源,第三电源,第一输入端和第一和第二节点的电压来控制第三和第四节点的电压。 第一输出单元根据第一电源,第二输入端和第三和第四节点的电压将输入信号输出到第一输出端。 第二输出单元根据第二电源,第二输入端和第三和第四节点的电压向第二输出端输出扫描信号。 控制器电耦合到第一输出端子和第二驱动器。

    COUPLING COMPENSATOR FOR DISPLAY PANEL AND DISPLAY DEVICE INCLUDING THE SAME
    6.
    发明申请
    COUPLING COMPENSATOR FOR DISPLAY PANEL AND DISPLAY DEVICE INCLUDING THE SAME 有权
    用于显示面板的耦合补偿器和包括其的显示装置

    公开(公告)号:US20160240128A1

    公开(公告)日:2016-08-18

    申请号:US14815795

    申请日:2015-07-31

    Abstract: A coupling compensator for a display panel and a display device including the coupling compensator are disclosed. In one aspect, the coupling compensator includes a memory configured to receive grayscale data and store the grayscale data and a first data converter configured to convert the grayscale data to a plurality of grayscale data voltages including first and second grayscale data voltages. The compensator also includes a coupling voltage calculator configured to calculate a line coupling voltage generated on a data line based on the difference between the first grayscale data voltage corresponding to the grayscale data provided to a first group of the pixels in an (N−1)th row and the second grayscale data voltage corresponding to the grayscale data provided to a first group of the pixels in an Nth row, where the N is an integer equal to or greater than 2.

    Abstract translation: 公开了一种用于显示面板的耦合补偿器和包括耦合补偿器的显示装置。 在一个方面,耦合补偿器包括被配置为接收灰度数据并存储灰阶数据的存储器和被配置为将灰度数据转换成包括第一和第二灰度数据电压的多个灰度数据电压的第一数据转换器。 补偿器还包括耦合电压计算器,其被配置为基于与提供给第(N-1)个像素中的第一组像素的灰度数据相对应的第一灰阶数据电压之间的差计算数据线上产生的线耦合电压, 以及与提供给第N行中的第一组像素的灰度级数据相对应的第二灰度数据电压,其中N是等于或大于2的整数。

    Organic light emitting display device

    公开(公告)号:US10410578B2

    公开(公告)日:2019-09-10

    申请号:US14789334

    申请日:2015-07-01

    Abstract: An organic light emitting display device includes a plurality of pixel columns, a first data wiring, a second data wiring, and a power supply wiring. The pixel columns include pixels repeatedly arranged in a first direction, and the pixel columns are repeatedly arranged in a second direction. The first and second directions are substantially perpendicular to each other. The first data wiring extends in the first direction and is connected to the pixels in an even row. The second data wiring extends in the first direction and are connected to the pixels in an odd row. The power supply wiring extends in the first direction between the first and second data wirings.

    Gate driver and display apparatus having the same
    8.
    发明授权
    Gate driver and display apparatus having the same 有权
    门驱动器和显示装置具有相同的功能

    公开(公告)号:US09479156B2

    公开(公告)日:2016-10-25

    申请号:US14312139

    申请日:2014-06-23

    Abstract: A gate driver, including multiple stages of gate driving circuits, wherein each stage of the gate driving circuits includes an input part configured to generate a Q node signal in response to a carry signal of one of previous stages and a clock signal, the Q node signal being applied to Q node, an output part configured to output a gate output signal to a gate output terminal in response to the Q node signal, and a charge sharing part connected to the gate output terminal of a present stage and a gate output terminal of one of next stages, the charge sharing part configured to operate charge-sharing between the gate output signal of the present stage and a gate output signal of one of the next stages in response to a select signal.

    Abstract translation: 一种栅极驱动器,包括多级栅极驱动电路,其中栅极驱动电路的每一级包括被配置为响应于先前级之一的进位信号和时钟信号而生成Q结点信号的输入部分,Q节点 信号被施加到Q节点,输出部分被配置为响应于Q节点信号将栅极输出信号输出到栅极输出端子,以及电荷共享部分连接到当前级的栅极输出端子和栅极输出端子 电荷共享部件被配置为响应于选择信号在当前级的栅极输出信号和下一级之一的栅极输出信号之间进行电荷共享。

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